MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 664

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 18 Memory Mapping Control (S12XMMCV3)
18.3.2.6
Read: Anytime
Write: Anytime
These eight index bits are used to page 4 KByte blocks into the RAM page window located in the local
(CPU or BDM) memory map from address 0x1000 to address 0x1FFF (see
accessing up to 1022 Kbytes of RAM (in the Global map) within the 64 KByte Local map. The RAM page
index register is effectively used to construct paged RAM addresses in the Local map
664
Address: 0x0016
Reset
W
R
1
2
Internal Flash means Flash resources inside the MCU are read/written.
Emulation memory means resources inside the emulator are read/written (PRU registers, flash
replacement, RAM, EEPROM and register space are always considered internal).
External application means resources residing outside the MCU are read/written.
The external access stretch mechanism is part of the EBI module (refer to EBI Block Guide for details).
Emulation Single Chip
Emulation Expanded
RP7
Special Single Chip
Normal Single Chip
RAM Page Index Register (RPAGE)
Normal Expanded
1
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Chip Modes
Special Test
Table 18-11. Data Sources when CPU or BDM is Accessing Flash Area
RP6
1
6
Figure 18-11. RAM Page Index Register (RPAGE)
MC9S12XDP512 Data Sheet, Rev. 2.21
RP5
ROMON
1
5
X
X
X
0
1
0
1
1
0
1
CAUTION
RP4
EROMON
1
4
X
X
X
X
X
X
0
1
0
1
RP3
1
3
External Application
External Application
External Application
Emulation Memory
Emulation Memory
DATA SOURCE
Internal Flash
Internal Flash
Internal Flash
Internal Flash
Internal Flash
RP2
1
2
Figure
1
18-12). This supports
Freescale Semiconductor
RP1
format.
0
1
Stretch
N
N
N
N
N
Y
Y
2
RP0
1
0