MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 700

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 19 S12X Debug (S12XDBGV2) Module
19.3.1.4
Read: Anytime
Write: Anytime the module is disarmed.
This register configures the comparators for range matching.
702
CDCM[3:2]
ABCM[1:0]
0x0023
Reset
Field
3–2
1–0
W
R
C and D Comparator Match Control — These bits determine the C and D comparator match mapping as
described in
A and B Comparator Match Control — These bits determine the A and B comparator match mapping as
described in
Debug Control Register2 (DBGC2)
0
0
7
TRANGE
TALIGN
Unimplemented or Reserved
11
00
01
10
11
Table
Table
0
0
6
19-14.
19-15.
Table 19-11. TRCMOD Trace Mode Bit Encoding
Table 19-12. TALIGN Trace Alignment Encoding
Figure 19-6. Debug Control Register2 (DBGC2)
TRCMOD
Table 19-10. TRANGE Trace Range Encoding
00
01
10
11
Table 19-13. DBGC2 Field Descriptions
Trace only in range from comparator C to comparator D
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
Trace buffer entries before and after trigger
Trigger at end of stored data
Trigger before storing data
0
0
4
Tracing Source
Description
Description
Reserved
0
3
Description
NORMAL
Reserved
DETAIL
LOOP1
CDCM
0
2
Freescale Semiconductor
0
1
ABCM
0
0