PIC16F707-E/P Microchip Technology, PIC16F707-E/P Datasheet - Page 97

• Manufacturer Part Number: PIC16F707-E/P
• Description: 14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F707-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC16F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

REGISTER 12-1:
TABLE 12-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
INTCON
OPTION_REG
TMR0
TRISA
Legend:
Name
R/W-1
RBPU
– = Unimplemented locations, read as ‘0’. Shaded cells are not used by the Timer0 module.
TRISA7
RBPU
Bit 7
RBPU: PORTB Pull-up Enable bit
1 = PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual PORT latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of INT pin
0 = Interrupt on falling edge of INT pin
TMR0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (F
TMR0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
GIE
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
INTEDG
R/W-1
OPTION_REG: OPTION REGISTER
INTEDG
TRISA6
PEIE
Bit 6
BIT VALUE
000
001
010
011
100
101
110
111
W = Writable bit
‘1’ = Bit is set
TMR0CS
TMR0CS
R/W-1
TMR0IE
TRISA5
Bit 5
TMR0 RATE
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
TMR0SE
Timer0 Module Register
TRISA4
Bit 4
INTE
TMR0SE
R/W-1
Preliminary
WDT RATE
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
OSC
TRISA3
PIC16F707/PIC16LF707
/4)
RBIE
Bit 3
PSA
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
PSA
TMR0IF
TRISA2
Bit 2
PS2
R/W-1
TRISA1
PS2
INTF
Bit 1
PS1
TRISA0
RBIF
Bit 0
PS0
x = Bit is unknown
R/W-1
PS1
0000 000x 0000 000x
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
POR, BOR
Value on
DS41418A-page 97
R/W-1
PS0
Value on
all other
Resets
bit 0