PIC16F707-E/P Microchip Technology, PIC16F707-E/P Datasheet - Page 19

• Manufacturer Part Number: PIC16F707-E/P
• Description: 14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F707-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC16F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 2-2:
 2010 Microchip Technology Inc.
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note 1:
Address
Bank 0
( 2)
( 2)
( 2)
( 2)
( 1),( 2)
( 2)
2:
3:
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are transferred to the
upper byte of the program counter.
These registers can be addressed from any bank.
Accessible only when SSPM<3:0> = 1001.
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRES
ADCON0
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Name
SPECIAL FUNCTION REGISTER SUMMARY
TMR1CS1 TMR1CS0 T1CKPS1
TMR1GIF
TMR3GIF
WCOL
SPEN
Bit 7
GIE
IRP
Addressing this location uses contents of FSR to address data memory (not a physical register)
—
—
—
—
—
—
TOUTPS3 TOUTPS2 TOUTPS1
TMR3IF
SSPOV
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
PEIE
ADIF
Bit 6
RP1
RX9
—
—
—
—
—
Synchronous Serial Port Receive Buffer/Transmit Register
PORTB Data Latch when written: PORTB pins when read
PORTC Data Latch when written: PORTC pins when read
PORTD Data Latch when written: PORTD pins when read
PORTA Data Latch when written: PORTA pins when read
TMRBIF
TMR0IE
SSPEN
DC1B1
DC2B1
SREN
CHS3
RCIF
Bit 5
RP0
Program Counter (PC) Least Significant Byte
—
—
Capture/Compare/PWM Register 1 (MSB)
Capture/Compare/PWM Register 2 (MSB)
Capture/Compare/PWM Register 1 (LSB)
Capture/Compare/PWM Register 2 (LSB)
Indirect Data Memory Address Pointer
Preliminary
USART Transmit Data Register
USART Receive Data Register
T1CKPS0
TMRAIF
DC1B0
DC2B0
Timer0 Module Register
Timer2 Module Register
CREN
CHS2
Bit 4
INTE
TXIF
CKP
TO
—
A/D Result Register
PIC16F707/PIC16LF707
Write Buffer for the upper 5 bits of the Program Counter
T1OSCEN
TOUTPS0
CCP1M3
CCP2M3
ADDEN
SSPM3
SSPIF
CHS1
RBIE
Bit 3
RE3
PD
—
TMR2ON
T1SYNC
CCP1M2
CCP2M2
TMR0IF
CCP1IF
SSPM2
FERR
CHS0
Bit 2
RE2
—
Z
GO/DONE
T2CKPS1
CCP1M1
CCP2M1
TMR2IF
SSPM1
OERR
Bit 1
INTF
RE1
DC
—
—
T2CKPS0
TMR1ON
CCP1M0
CCP2M0
TMR1IF
CCP2IF
SSPM0
ADON
RX9D
Bit 0
RBIF
RE0
C
DS41418A-page 19
xxxx xxxx
0000 0000
0000 0000
0001 1xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- xxxx
---0 0000
0000 000x
0000 0000
0000 ---0
xxxx xxxx
xxxx xxxx
0000 00-0
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
--00 0000
POR, BOR
Value on:
Value on all
xxxx xxxx
0000 0000
0000 0000
000q quuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- uuuu
---0 0000
0000 000u
0000 0000
0000 ---0
uuuu uuuu
uuuu uuuu
uuuu uu-u
0000 0000
-000 0000
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
--00 0000
0000 000x
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
--00 0000
uuuu uuuu
--00 0000
resets
other