PIC16F707-E/P Microchip Technology, PIC16F707-E/P Datasheet - Page 229

• Manufacturer Part Number: PIC16F707-E/P
• Description: 14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F707-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC16F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 25-13: I
 2010 Microchip Technology Inc.
Note 1:
SP100*
SP101*
SP102*
SP103*
SP106*
SP107*
SP109*
Param.
SP110*
SP111
No.
2:
*
These parameters are characterized but not tested.
As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region
(min. 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
A Fast mode (400 kHz) I
the requirement T
not stretch the low period of the SCL signal. If such a device does stretch the low period of the SCL signal,
it must output the next data bit to the SDA line T
the Standard mode I
T
T
T
T
T
T
T
T
C
Symbol
SU
AA
R
HIGH
LOW
F
HD
BUF
B
:
:
DAT
DAT
2
C™ BUS DATA REQUIREMENTS
Clock high time
Clock low time
SDA and SCL rise
time
SDA and SCL fall
time
Data input hold
time
Data input setup
time
Output valid from
clock
Bus free time
Bus capacitive loading
SU
:
2
DAT
C bus specification), before the SCL line is released.
Characteristic
2
250 ns must then be met. This will automatically be the case if the device does
C
™
bus device can be used in a Standard mode (100 kHz) I
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
Preliminary
PIC16F707/PIC16LF707
R
max. + T
1.5T
1.5T
0.1C
0.1C
Min.
20 +
20 +
250
100
4.0
0.6
4.7
1.3
4.7
1.3
—
—
—
—
—
0
0
CY
CY
B
B
SU
:
DAT
Max.
1000
3500
300
250
250
0.9
400
—
—
—
—
—
—
—
—
—
—
—
—
= 1000 + 250 = 1250 ns (according to
Units
pF
s
s
s
s
ns
ns
ns
ns
ns
s
ns
ns
ns
ns
s
s
Device must operate at a
minimum of 1.5 MHz
Device must operate at a
minimum of 10 MHz
Device must operate at a
minimum of 1.5 MHz
Device must operate at a
minimum of 10 MHz
C
10-400 pF
C
10-400 pF
(Note 2)
(Note 1)
Time the bus must be free
before a new transmis-
sion can start
B
B
is specified to be from
is specified to be from
2
Conditions
C bus system, but
DS41418A-page 229