PIC16F707-E/P Microchip Technology, PIC16F707-E/P Datasheet - Page 147

• Manufacturer Part Number: PIC16F707-E/P
• Description: 14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F707-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC16F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.2
The Baud Rate Generator (BRG) is an 8-bit timer that
is dedicated to the support of both the asynchronous
and synchronous AUSART operation.
The SPBRG register determines the period of the free
running baud rate timer. In Asynchronous mode the
multiplier of the baud rate period is determined by the
BRGH bit of the TXSTA register. In Synchronous mode,
the BRGH bit is ignored.
Table 18-3 contains the formulas for determining the
baud rate. Example 18-1 provides a sample calculation
for determining the baud rate and baud rate error.
Typical baud rates and error values for various
Asynchronous modes have been computed for your
convenience and are shown in Table 18-5. It may be
advantageous to use the high baud rate (BRGH = 1), to
reduce the baud rate error.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures that
the BRG does not wait for a timer overflow before
outputting the new baud rate.
TABLE 18-3:
TABLE 18-4:
 2010 Microchip Technology Inc.
Legend: x = Don’t care, n = value of SPBRG register
RCSTA
SPBRG
TXSTA
Legend:
Name
SYNC
Configuration Bits
0
0
1
AUSART Baud Rate Generator
(BRG)
x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for the Baud Rate Generator.
CSRC
SPEN
BRG7
Bit 7
BAUD RATE FORMULAS
REGISTERS ASSOCIATED WITH THE BAUD RATE GENERATOR
BRG6
BRGH
Bit 6
RX9
TX9
0
1
x
SREN
BRG5
TXEN
Bit 5
CREN
BRG4
SYNC
Bit 4
AUSART Mode
Asynchronous
Asynchronous
Synchronous
Preliminary
ADDEN
BRG3
Bit 3
—
PIC16F707/PIC16LF707
BRGH
FERR
BRG2
EXAMPLE 18-1:
Bit 2
For a device with F
9600, and Asynchronous mode with SYNC = 0 and BRGH
= 0 (as seen in Table 18-5):
Solving for SPBRG:
%
Desired Baud Rate
Error
Actual Baud Rate
OERR
BRG1
TRMT
Bit 1
=
=
SPBRG




Actual Baud Rate Desired Baud Rate
------------------------------------------------------------------------------------------------- -
9615 9600
----------------------------- -
9600
OSC
–
BRG0
RX9D
TX9D
Bit 0
=
=
=
=
=
=
CALCULATING BAUD
RATE ERROR
Desired Baud Rate





-------------------------- -
64 25
9615
Baud Rate Formula
of 16 MHz, desired baud rate of
-------------------------------------- -
64 SPBRG
16000000
25.042
-------------------------------------------------------- -
64 Desired Baud Rate
----------------------- -
64
16000000




100
F
F

F

OSC
OSC
F
9600
OSC
0000 000x
0000 0000
0000 -010
+
POR, BOR
OS C
Value on

=
–
1
/[64 (n+1)]
/[16 (n+1)]
=
F

/[4 (n+1)]

0.16%


+
OS C
25
–
1
DS41418A-page 147
1

0000 000x
0000 0000
0000 -010

Value on
all other


Resets
–
1


100