PIC16F707-E/P Microchip Technology, PIC16F707-E/P Datasheet - Page 56

• Manufacturer Part Number: PIC16F707-E/P
• Description: 14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F707-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC16F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F707/PIC16LF707
REGISTER 6-5:
REGISTER 6-6:
REGISTER 6-7:
DS41418A-page 56
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
TRISB7
WPUB7
R/W-1
R/W-1
R/W-x
RB7
2:
Global RBPU bit of the OPTION register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
RB<7:0>: PORTB I/O Pin bit
1 = Port pin is > V
0 = Port pin is < V
TRISB<7:0>: PORTB Tri-State Control bit
1 = PORTB pin configured as an input (tri-stated)
0 = PORTB pin configured as an output
WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
TRISB6
WPUB6
R/W-x
R/W-1
R/W-1
RB6
PORTB: PORTB REGISTER
TRISB: PORTB TRI-STATE REGISTER
WPUB: WEAK PULL-UP PORTB REGISTER
W = Writable bit
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
‘1’ = Bit is set
TRISB5
WPUB5
R/W-x
IH
IL
R/W-1
R/W-1
RB5
TRISB4
WPUB4
R/W-1
R/W-1
R/W-x
RB4
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WPUB3
TRISB3
R/W-x
R/W-1
R/W-1
RB3
TRISB2
WPUB2
R/W-1
R/W-1
R/W-x
RB2
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
WPUB1
TRISB1
R/W-x
R/W-1
R/W-1
RB1
TRISB0
WPUB0
R/W-1
R/W-1
R/W-x
RB0
bit 0
bit 0
bit 0