PIC16F707-E/P Microchip Technology, PIC16F707-E/P Datasheet - Page 34

• Manufacturer Part Number: PIC16F707-E/P
• Description: 14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F707-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC16F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F707/PIC16LF707
3.6
On power-up, the time-out sequence is as follows: first,
PWRT time-out is invoked after POR has expired, then
OST is activated after the PWRT time-out has expired.
The total time-out will vary based on oscillator configu-
ration and PWRTE bit status. For example, in EC mode
with PWRTE bit = 1 (PWRT disabled), there will be no
time-out at all. Figure 3-5, Figure 3-6 and Figure 3-7
depict time-out sequences.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then,
bringing MCLR high will begin execution immediately
(see Figure 3-6). This is useful for testing purposes or
to
PIC16LF707 device operating in parallel.
Table 3-2 shows the Reset conditions for some special
registers.
TABLE 3-4:
FIGURE 3-5:
DS41418A-page 34
XT, HS, LP
RC, EC, INTOSC
Oscillator Configuration
synchronize
PWRT Time-out
OST Time-out
Internal Reset
Time-out Sequence
Internal POR
MCLR
V
TIME-OUT IN VARIOUS SITUATIONS
DD
more
TIME-OUT SEQUENCE ON POWER-UP (DELAYED MCLR): CASE 1
than
T
PWRT
PWRTE = 0
T
one
T
PWRT
OSC
+ 1024 •
PIC16F707/
Power-up
1024 • T
PWRTE = 1
Preliminary
—
OSC
T
PWRT
indicating that a brown-out has occurred. The BOR
Status bit is a “don’t care” and is not necessarily
predictable if the brown-out circuit is disabled
3.7
The Power Control (PCON) register has two Status bits
to indicate what type of Reset that last occurred.
Bit 0 is BOR (Brown-out Reset). BOR is unknown on
Power-on Reset. It must then be set by the user and
checked on subsequent Resets to see if BOR = 0,
(BOREN<1:0> = 00 in the Configuration Word register).
Bit 1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent Reset, if POR is ‘0’, it will indicate that a
Power-on Reset has occurred (i.e., V
gone too low).
For more information, see Section 3.5 “Brown-Out
Reset (BOR)”.
T
PWRT
PWRTE = 0
T
T
PWRT
Power Control (PCON) Register
OSC
+ 1024 •
Brown-out Reset
T
OST
PWRTE = 1
1024 • T
 2010 Microchip Technology Inc.
—
OSC
Wake-up from
1024 • T
DD
Sleep
may have
—
OSC