PIC16F707-E/P Microchip Technology, PIC16F707-E/P Datasheet - Page 133

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PIC16F707-E/P

Manufacturer Part Number
PIC16F707-E/P
Description
14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16F707-E/P

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
363 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC16F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F707-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
17.3
The PWM mode generates a pulse-width modulated
signal on the CCPx pin. The duty cycle, period and
resolution are determined by the following registers:
• PR2
• T2CON
• CCPRxL
• CCPxCON
In Pulse-Width Modulation (PWM) mode, the CCP
module produces up to a 10-bit resolution PWM output
on the CCPx pin.
Figure 17-3 shows a simplified block diagram of PWM
operation.
Figure 17-4 shows a typical waveform of the PWM
signal.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, refer to Section 17.3.8
“Setup for PWM Operation”.
FIGURE 17-3:
 2010 Microchip Technology Inc.
Note 1:
CCPRxH
Duty Cycle Registers
Comparator
2:
CCPRxL
PWM Mode
PR2
TMR2
Comparator
The 8-bit timer TMR2 register is concatenated
with the 2-bit internal system clock (F
2 bits of the prescaler, to create the 10-bit time
base.
In PWM mode, CCPRxH is a read-only register.
(2)
(Slave)
(1)
SIMPLIFIED PWM BLOCK
DIAGRAM
Clear Timer2,
toggle CCPx pin and
latch duty cycle
CCPxCON<5:4>
S
R
Q
TRIS
OSC
CCPx
), or
Preliminary
PIC16F707/PIC16LF707
The PWM output (Figure 17-4) has a time base
(period) and a time that the output stays high (duty
cycle).
FIGURE 17-4:
17.3.1
In PWM mode, the CCPx pin is multiplexed with the
PORT data latch. The user must configure the CCPx
pin as an output by clearing the associated TRIS bit.
Either RC1 or RB3 can be selected as the CCP2 pin.
Refer to Section 6.1 “Alternate Pin Function” for
more information.
Note:
Pulse Width
TMR2 = 0
CCPX PIN CONFIGURATION
Clearing the CCPxCON register will
relinquish CCPx control of the CCPx pin.
Period
CCP PWM OUTPUT
TMR2 = CCPRxL:CCPxCON<5:4>
TMR2 = PR2
DS41418A-page 133

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