PIC16F707-E/P Microchip Technology, PIC16F707-E/P Datasheet - Page 54

• Manufacturer Part Number: PIC16F707-E/P
• Description: 14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F707-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC16F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F707/PIC16LF707
6.2.2.4
The RA3 pin is configurable to function as one of the
following:
• General purpose I/O
• Analog input for the A/D
• Voltage Reference input for the A/D
• Capacitive sensing input
6.2.2.5
The RA4 pin is configurable to function as one of the
following:
• General purpose I/O
• Capacitive sensing input
• Clock input for Timer0
• Clock input for TimerA
The Timer0 clock input function works independently
of any TRIS register setting. Effectively, if TRISA4 = 0,
the PORTA4 register bit will output to the pad and
clock Timer0 at the same time.
6.2.2.6
The RA5 pin is configurable to function as one of the
following:
• General purpose I/O
• Capacitive sensing input
• Analog input for the A/D
• Slave Select input for the SSP
• Voltage Regulator Capacitor pin (PIC16F707
TABLE 6-1:
DS41418A-page 54
ADCON0
ADCON1
ANSELA
APFCON
CPSACON0
CPSACON1
CPSBCON0
CPSBCON1
CONFIG2
OPTION_REG
PORTA
SSPCON
TRISA
TACON
DACCON0
Legend:
Note
only)
Note 1: SS pin location may be selected as RA5
Name
1:
(1)
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.
PIC16F707 only.
or RA0.
RA3/AN3/V
RA4/CPSA3/T0CKI/TACKI
RA5/AN4/CPSA4/SS/V
TMRAON
CPSAON
CPSBON
TRISA7
DACEN
ANSA7
WCOL
RBPU
Bit 7
RA7
—
—
—
—
—
—
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
CPSARM
CPSBRM
DACLPS
INTEDG
SSPOV
TRISA6
ADCS2
ANSA6
REF
Bit 6
RA6
—
—
—
—
—
—
+/CPSA2
(1)
VCAPEN1 VCAPEN0
TMR0CS TMR0SE
DACOE
SSPEN
TRISA5
ADCS1
ANSA5
CHS3
TACS
Bit 5
RA5
—
—
—
—
—
CAP
TRISA4
ADCS0
ANSA4
CHS2
TASE
Bit 4
RA4
CKP
—
—
—
—
—
—
Preliminary
CPSARNG1
CPSBRNG1
CPSACH3
CPSBCH3
DACPSS1
TRISA3
ANSA3
SSPM3
TAPSA
CHS1
Bit 3
PSA
RA3
—
—
—
6.2.2.7
The RA6 pin is configurable to function as one of the
following:
• General purpose I/O
• Crystal/resonator connection
• Clock Output
• Voltage Regulator Capacitor pin (PIC16F707
• Capacitive sensing input
6.2.2.8
The RA7 pin is configurable to function as one of the
following:
• General purpose I/O
• Crystal/resonator connection
• Clock Input
• Capacitive sensing input.
CPSARNG0
CPSBRNG0
CPSACH2
CPSBCH2
DACPSS0
only)
TRISA2
ANSA2
SSPM2
TAPS2
CHS0
Bit 2
RA2
PS2
—
—
—
CPSAOUT
CPSBOUT
GO/DONE
CPSACH1
CPSBCH1
RA6/CPSB1/OSC2/CLKOUT/V
RA7/CPSB0/OSC1/CLKIN
ADREF1
SSPM1
TRISA1
ANSA1
SSSEL
TAPS1
Bit 1
PS1
RA1
—
—
CPSACH0
CPSBCH0
CCP2SEL
 2010 Microchip Technology Inc.
ADREF0
TRISA0
ANSA0
TAXCS
TBXCS
SSPM0
TAPS0
ADON
Bit 0
PS0
RA0
—
—
--00 0000
-000 --00
1111 1111
---- --00
00-- 0000
---- 0000
00-- 0000
---- 0000
1111 1111
xxxx xxxx
0000 0000
1111 1111
0-00 0000
000- 00--
POR, BOR
Value on
—
--00 0000
-000 --00
1111 1111
---- --00
00-- 0000
---- 0000
00-- 0000
---- 0000
1111 1111
xxxx xxxx
0000 0000
1111 1111
0-00 0000
000- 00--
Value on
CAP
all other
Resets
—