PIC16F707-E/P Microchip Technology, PIC16F707-E/P Datasheet - Page 51

• Manufacturer Part Number: PIC16F707-E/P
• Description: 14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F707-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC16F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6.0
There are thirty-five general purpose I/O pins available.
Depending on which peripherals are enabled, some or
all of the pins may not be available as general purpose
I/O. In general, when a peripheral is enabled, the
associated pin may not be used as a general purpose
I/O pin.
Each port has two registers for its operation. These
registers are:
• TRISx registers (data direction register)
• PORTx registers (port read/write register)
Ports with analog functions also have an ANSELx
register which can disable the digital input and save
power. A simplified model of a generic I/O port, without
the interfaces to other peripherals, is shown in
Figure 6-1.
REGISTER 6-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1
bit 0
U-0
—
I/O PORTS
Unimplemented: Read as ‘0’.
SSSEL: SS Input Pin Selection bit
0 = SS function is on RA5/AN4/CPS7/SS/V
1 = SS function is on RA0/AN0/SS/V
CCP2SEL: CCP2 Input/Output Pin Selection bit
0 = CCP2 function is on RC1/T1OSI/CCP2
1 = CCP2 function is on RB3/CCP2
U-0
—
APFCON: ALTERNATE PIN FUNCTION CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
Preliminary
—
CAP
PIC16F707/PIC16LF707
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CAP
FIGURE 6-1:
6.1
The Alternate Pin Function Control (APFCON) register
is used to steer specific peripheral input and output
functions between different pins. The APFCON register
is shown in Register 6-1. For this device family, the
following functions can be moved between different
pins.
• SS (Slave Select)
• CCP2
U-0
To peripherals
—
Write PORTx
Data Bus
Read PORTx
Alternate Pin Function
Data Register
U-0
—
D
CK
ANSELx
GENERIC I/O PORT
OPERATION
Q
x = Bit is unknown
SSSEL
R/W-0
TRISx
DS41418A-page 51
CCP2SEL
V
V
R/W-0
DD
SS
I/O pin
bit 0