DJLXT384LE Intel, DJLXT384LE Datasheet - Page 81

• Manufacturer Part Number: DJLXT384LE
• Manufacturer: Intel

Specifications of DJLXT384LE

• Lead Free Status / RoHS Status: Not Compliant

Document Number: 248994
Revision Number: 005
Revision Date: November 28, 2005
Table 39. Performance-Monitoring Register, MON - 0Bh
Table 39
either Receivers 1 through 7 or one of Transmitters 1 through 7, depending on the setting on the A3
bit. (For more information on performance monitoring, see
Monitoring”.)
Bit
7:4
3:0
lists and describes the A3:0 bits that can be used to monitor the performance of one of
Name
A7:4
A3:0
Reserved.
A3:0 (Performance Monitoring Select).
When bits A3:0 are all ‘0’, there is no performance monitoring of receivers, and
the LXT384 Transceiver is configured as an octal line transceiver without
monitoring capability.
• When A3 is cleared to ‘0’, the following table is used to select how to
• When A3 is set to ‘1’, the following table is used to select how to monitor
monitor the performance of receivers.
the performance of transmitters. (Transmitter monitoring is not supported
when the respective channel is set to analog loopback mode.)
A3
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A2
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Intel
A1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
A0
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
No performance monitoring
Performance monitoring of Receiver 1
Performance monitoring of Receiver 2
Performance monitoring of Receiver 3
Performance monitoring of Receiver 4
Performance monitoring of Receiver 5
Performance monitoring of Receiver 6
Performance monitoring of Receiver 7
No performance monitoring
Performance monitoring of Transmitter 1
Performance monitoring of Transmitter 2
Performance monitoring of Transmitter 3
Performance monitoring of Transmitter 4
Performance monitoring of Transmitter 5
Performance monitoring of Transmitter 6
Performance monitoring of Transmitter 7
Section 6.9, “Performance
Selection
Selection
R/W
R/W
-
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