DJLXT384LE Intel, DJLXT384LE Datasheet - Page 118

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DJLXT384LE

Manufacturer Part Number
DJLXT384LE
Description
Manufacturer
Intel
Datasheet

Specifications of DJLXT384LE

Lead Free Status / RoHS Status
Not Compliant

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Manufacturer:
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118
Table 70. Motorola Processor - Write Timing Characteristics
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Table 70
Address setup time to address strobe
Address hold time to address strobe
Valid address strobe pulse width
R/W setup time to active data strobe
R/W hold time from inactive data strobe
Chip select setup time to active data strobe
Chip select hold time from inactive data strobe
Address strobe active to data strobe active delay
Data setup time to DS deassertion
Data hold time from DS deassertion
Valid data strobe pulse width
Inactive data strobe to inactive INT delay time
Data strobe inactive to address strobe inactive delay
Active data strobe to ACK output enable time
DS asserted to ACK asserted delay
1. Minimum and maximum figures are at 25 C° and are for design aid only, not guaranteed, and not subject to
production testing.
lists write timing characteristics for the Motorola processor.
Parameter
t
t
DACKP
Sym.
t
t
t
t
t
t
t
t
t
t
ASDS
t
DSAS
DACK
t
SRW
HRW
SDW
HDW
t
SAS
HAS
SCS
HCS
VDS
VAS
INT
Min.
10
95
10
20
40
30
60
15
5
0
0
0
0
-
-
1
Max.
10
12
40
-
-
-
-
-
-
-
-
-
-
-
-
Revision Date: November 28, 2005
1
Document Number: 248994
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Revision Number: 005
C
on D7:0.
All other
outputs are
loaded with
50 pF.
Conditions
L
= 100 pF
Test

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