DJLXT384LE Intel, DJLXT384LE Datasheet - Page 115
DJLXT384LE
Manufacturer Part Number
DJLXT384LE
Description
Manufacturer
Intel
Datasheet
1.DJLXT384LE.pdf
(140 pages)
Specifications of DJLXT384LE
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Not Compliant
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11.2.2
Document Number: 248994
Revision Number: 005
Revision Date: November 28, 2005
Table 69. Motorola Processor - Read Timing Characteristics
Motorola* Processor - Parallel Interface Timing
Table 69
Address setup time to address or data strobe
Address hold time from address or data strobe
Valid address strobe pulse width
R/W setup time to active data strobe
R/W hold time from inactive data strobe
Chip select setup time to active data strobe
Chip select hold time from inactive data strobe
Address strobe active to data strobe active delay
Delay time from active data strobe to valid data
Delay time from inactive data strobe to data high impedance
Valid data strobe pulse width
Inactive data strobe to inactive INT delay time
Data strobe inactive to address strobe inactive delay
DS asserted to ACK asserted delay
DS deasserted to ACK deasserted delay
Active ACK to valid data delay
1. Minimum and maximum values are at 25 C° and are for design aid only, not guaranteed, and not subject to
production testing.
lists read timing characteristics for the Motorola processor.
Parameter
Intel
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
t
DACKP
t
Sym.
t
t
t
t
t
t
t
t
t
ASDS
t
t
DSAS
DACK
t
PACK
SRW
HRW
t
HAR
HCS
SAR
SCS
PDS
t
VDS
VAS
INT
DZ
Min.
10
95
10
20
60
15
5
0
0
0
3
3
–
–
–
–
1
Max.
30
30
10
40
10
–
–
–
–
–
–
–
–
–
–
0
1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
C
on D7:0.
All other
outputs are
loaded with
50 pF.
Conditions
L
= 100pF
Test
115
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