DJLXT384LE Intel, DJLXT384LE Datasheet - Page 62

• Manufacturer Part Number: DJLXT384LE
• Manufacturer: Intel

Specifications of DJLXT384LE

• Lead Free Status / RoHS Status: Not Compliant

Intel
6.7
6.7.1
62
Figure 8. Intel
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Loopbacks
For diagnostics, the LXT384 Transceiver has the following loopback modes:
To select a loopback mode when the mode is in:
Analog Loopback
As
connected internally to the receiver inputs RTIP and RRING. For the corresponding receiver, clock
and data signals are output at RCLK, RPOS, and RNEG. (For the LOOP pin settings that select
analog loopback, see
When the LXT384 Transceiver is in an analog loopback, it ignores signals on RTIP and RRING.
•
•
•
•
•
Figure 8
RNEG
RPOS
TPOS
TNEG
RCLK
TCLK
Section 6.7.1, “Analog Loopback”
Section 6.7.2, “Digital Loopback”
Section 6.7.3, “Remote Loopback”
Hardware mode, the LOOP pins can be used to select either an analog or remote loopback.
(See
Host Processor mode, the ALOOP, DLOOP, and RLOOP registers can be used to select an
analog, digital, or remote loopback. (See
®
LXT384 Transceiver Analog Loopback
Section 5.4, “Line Interface Unit
* If Enabled
shows, when analog loopback is selected, the transmitter TTIP and TRING outputs are
Section 5.4, “Line Interface Unit
JA*
JA*
Recovery
Timing &
Control
Timing
Signals”.)
Chapter 8.0,
Signals”.)
“Registers”.)
TTIP
TRING
RTIP
RRING
Revision Date: November 28, 2005
Document Number: 248994
Revision Number: 005