STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 9

• Manufacturer Part Number: STLC5466
• Description: RF Wireless Misc Multi-HDLC Sw Matrix
• Manufacturer: STMicroelectronics
• Type: Telecom ICr

Specifications of STLC5466

• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-176
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BOUDARY SCAN
MICROPROCESSOR INTERFACE
Pin N°
Type
TTL
TTL
TTL
TTL
CMOS
CMOS
128
130
41
42
47
48
49
50
64
65
66
53
54
55
56
57
58
59
60
61
62
7
8
3
6
SIZE1/NBHE/NUDS
SIZE0/NLDS/NLBA
ft: five volts tolerant
I1_ft = Input TTL
I/O6 _ft = Input TTL/ Output TTL 6 mA
O3 _ft = Output TTL 3 mA O3T_ft = O3_ft+Tristate
O6D_ft = Output TTL 6mA, Open Drain
I/O8_fnt = Input TTL, /Output CMOS 8mA;
O4_fnt = Output CMOS 4mA
NDIS/NCS2
R/W / NWR
NDSACK0/
NDSACK1/
ALE/NADS
NDTACK/
NREADY
NRESET
Symbol
READY
NTRST
MOD0
MOD1
MOD2
NCS0
NCS1
WDO
NAS/
TMS
TDO
INT0
INT1
CB1
EC1
CB2
EC2
TCK
TDI
O6T_ft/
O6T_ft/
O6D_ft
O6D_ft
O6D_ft
O3T_ft
O6T_ft
O6T_ft
O3_ft
O3_ft
O3_ft
Type
I3_ft
I3_ft
I3_ft
I4_ft
I2_ft
I2_ft
I4_ft
I1_ft
I1_ft
I1_ft
I3_ft
I3_ft
I3_ft
I3_ft
I3_ft
I3_ft
I3_ft
fnt: five volts not tolerant
I2_ft = I1_ft+pull up
If 386EX interface is not selected: DOUT 0/7 Not Disable. When this pin is at
0V, the Data Output 0/7 are at high impedance. Wired at V
If 386EX interface is selected: NCS2 (Chip Select 2) equivalent to NCS1.
Chip Select 2: external memory is selected
During Chip select (NCS2=0), the output Ready (pin 59) is low impedance and
outside Chip select (NCS2=1), the output Ready is high impedance.
Contention Bus (CSMA/CR) for 1st 32 HDLC Controller
Echo for 1st 32 HDLC Controller. Wired at V
Contention Bus (CSMA/CR) for 2nd 32 HDLC Controller
Echo for 2nd 32 HDLC Controller. Wired at V
Reset for boundary scan
Mode Selection for boundary scan
Input Data for boundary scan
Output Data for boundary scan
Clock for boundary scan
80C188 80C186 68000
Circuit Reset
Chip Select 0: internal registers are selected
Chip Select 1: external memory is selected
During Chip select (NCS1=0), the output Ready (pin 59) is low impedance and
outside Chip select (NCS1=1), the output Ready is high impedance.
Interrupt generated by HDLC, RxC/I or RxMON. Active high.
Interrupt1.This pin goes to 5V when the selected clock A (or B) has disap-
peared; 250 s after reset this pin goes to 5V also if clock A is not present.
Watch Dog Output.This pin goes to 5V during 250 s when the microprocessor
has not reset the Watch Dog during the programmable time.
Transfer Size0 (68020)/Lower Data Stobe/Local Bus Access# when 386EX
Transfer Size1(68020)/Bus High Enable (Intel) / Upper Data Strobe (68000)
Data Strobe, Acknowledge and Size0 (68020)/
Data Transfer Acknowledge (68000 and ST10)/
READY# (386EX)
Data Strobe, Acknowledge and Size1 (68020)/
Data Transfer Acknowledge (Intel)
Address Strobe(Motorola) /
Address Latch Enable(Intel) / Address Status 386EX
Read/Write (Motorola) / Write(Intel)
1
1
0
1
1
1
I3_ft = I1_ft+hysteresis
O6_ft = Output TTL 6mA
O6DT_ft = Output TTL 6mA, Open Drain or Tristate
O8T_fnt = Output CMOS
8mA
0
0
1
68020
0
0
0
Function
ST9
1
0
0
I4_ft = I3_ft+pull up
I5_ft = I3_ft+pull down;
I/O8_fnt = Input TTL, /Output CMOS
8mA
SS
SS
if not used.
ST10 m
if not used.
1
0
1
ST10Nm
DD
0
1
1
if not used.
STLC5466
386EX
0
1
0
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