STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 57

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STLC5466

Manufacturer Part Number
STLC5466
Description
RF Wireless Misc Multi-HDLC Sw Matrix
Manufacturer
STMicroelectronics
Type
Telecom ICr
Datasheets

Specifications of STLC5466

Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-176
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
HS0/2 : HDLC Interrupt Queue Size
TBFS : Time Base running with Frame Synchronisation signal
VI.29 - Interrupt Register
This register is read only.
When this register is read by the microprocessor, this register is reset (0000) .
If not masked, each bit at “1” generates “1” on INT0 pin.
Bit 0 and bit 5 to 10 are common to 64 HDLC controllers.
HDLC
C/IRX
MRX
MTX
ICOV
bit15
Nu
Nu
These three bits define the size of HDLC status Interrupt Queue in external memory for each
channel.
The location is IBA+256 (see The Initiate Block Address (IBA))
TBFS=1, the Time Base defined by the Timer Register (see page 84) is running on the rising
edge of Frame Synchronisation signal.
TBFS=0, the Time Base defined by the Timer Register is running on the rising edge of MCLK
signal.
HS2
: HDLC INTERRUPT
: Command/Indicate Rx Interrupt
: Rx MONITOR CHANNEL INTERRUPT
: Tx MONITOR CHANNEL INTERRUPT
: INTERRUPT CIRCULAR OVERLOAD
SFCO PRSR TIM
0
0
0
0
1
1
1
1
HDLC = 1, Tx HDLC or Rx HDLC has generated an interrupt The status is in the HDLC
queue.
C/IRX = 1, Rx Command/Indicate has generated an interrupt. The status is in the HDLC
queue.
MRX = 1, one Rx MONITOR CHANNEL has generated an interrupt. The status is in the Rx
Monitor Channel queue
MTX = 1, one or several Tx MONITOR CHANNELS have generated an interrupt. Transmit
Monitor Interrupt Register (TMIR) indicates the Tx Monitor Channels which have generated
this interrupt.
ICOV = 1, One of three circular interrupt memories is completed.
HS1
0
0
1
1
0
0
1
1
HS0
0
1
0
1
0
1
0
1
Queue Size
1024 words
128 words
384 words
512 words
640 words
768 words
896 words
FOV
256 word
INT
HDLC
FWAR
INT
After reset (0000)
MS2
FOV
bit8
0
0
0
0
1
1
1
1
Tx
MS1
FWAR
1
0
0
1
1
0
0
1
bit7
Tx
MS0
0
1
0
1
0
1
0
1
FOV
H
Rx
1024 words
Queue Size
FWAR
128 words
384 words
512 words
640 words
768 words
896 words
256 word
Rx
MON
ICOV MTX MRX C/IRX HDLC
CS1
0
0
1
1
CS0
0
1
0
1
STLC5466
Queue Size
128 words
192 words
256 words
64 words
C/I
IR (38)
57/130
bit0
H

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