STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 78

• Manufacturer Part Number: STLC5466
• Description: RF Wireless Misc Multi-HDLC Sw Matrix
• Manufacturer: STMicroelectronics
• Type: Telecom ICr

Specifications of STLC5466

• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-176
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STLC5466
A
ODD : Odd byte number
In case of V* protocol ODD,A,F,L bits are respectively 1,0,1,1.
M1/8
M11/18 : Next new Byte received twice consecutively if GCI Protocol has been validated.
VII.6.2 - Receive Monitor Interrupt when TSV = 1
TSV: Time Stamping Validated (bit of GCR Register)
These four words are located in the Monitor interrupt queue; IQSR Register indicates the size of this in-
terrupt queue located in the external memory.
NS
G0
L
F
A
ODD
M1/8
M11/18 : Next new Byte received twice consecutively if GCI Protocol has been validated.
T15/0
78/130
bit15
M18
T15
NS
0
: Abort
M17
T14
A=1, Received message has been aborted.
ODD = 1, one byte has been written in the following word.
ODD = 0, two bytes have been written in the following word.
0
: New Byte received twice consecutively if GCI Protocol has been validated.
: New Status.
: G0 = 0, GCI 0 corresponding to DIN4 input and DOUT4 output.
: Last byte
: First byte
: Abort
: New Byte received twice consecutively if GCI Protocol has been validated.
: Binary counter value when a new primitive is occurred.
Byte received once if V* Protocol has been validated.
This byte is at “1” in case of V* protocol.
Before writing the features of event in the external memory the Interrupt Controller reads the
NS bit:
if NS = 0, the Interrupt Controller stores two new bytes M1/8 and M11/18 then puts NS bit at
‘1’ when it writes the status of these two bytes which has been received.
if NS = 1, the Interrupt Controller puts ICOV bit at ‘1’ to generate an interrupt (IR Register).
G0 = 1, GCI 1 corresponding to DIN5 input and DOUT5 output.
L=1, two cases:
if ODD = 1, the following word of the Interrupt Queue contains the Last byte of message.
if ODD =0, the Last byte of message has been stored at the previous access of the Interrupt
Queue (concerning this channel).
L=0, the following word and the previous word does not contain the Last byte of message.
F=1, the following word contains the First byte of message.
F=0, the First byte of message is not the following word.
A=1, Received message has been aborted.
Odd byte number
ODD = 1, one byte has been written in the following word.
ODD = 0, two bytes have been written in the following word.
Byte received once if V* Protocol has been validated.
This byte is at “1” in case of V* protocol.
M16
T13
0
M15
T12
0
M14
T11
G0
0
M13
T10
A2
0
M12
A1
T9
0
M11
bit8
A0
T8
0
bit7
M8
T7
0
M7
T6
0
M6
T5
0
M5
T4
0
ODD
M4
T3
0
M3
T2
A
0
M2
T1
F
0
bit 0
M1
T0
L
0