STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 58

• Manufacturer Part Number: STLC5466
• Description: RF Wireless Misc Multi-HDLC Sw Matrix
• Manufacturer: STMicroelectronics
• Type: Telecom ICr

Specifications of STLC5466

• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-176
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STLC5466
VI.30 - Interrupt Mask Register
IM13/0 : INTERRUPT MASK 0/7
58/130
RxFWAR : Rx DMA CONTROLLER FIFO WARNING
RxFOV
TxFWAR : Tx DMA CONTROLLER FIFO WARNING
TxFOV
INTFWAR: INTERRUPT CONTROLLER FIFO WARNING
INTFOV : INTERRUPT CONTROLLER FIFO OVERLOAD
TIM
PRSR
SFCO
bit15
Nu
Nu
When IM0 = 1, HDLC bit is masked.
When IM1 =1, C/IRX bit is masked.
When IM2 = 1, MRX bit is masked.
When IM3 = 1, MTX bit is masked.
When IM4 = 1, ICOV bit is masked
When IM5 = 1, RxFWAR bit is masked.
When IM6 = 1, RxFOV bit is masked.
When IM7 = 1, TxFWAR bit is masked.
When IM8 = 1, TxFOV bit is masked.
When IM9 = 1, INTFWAR bit is masked.
When IM10 = 1, INTFOV bit is masked.
When IM11 = 1, TIM bit is masked.
When IM12 = 1, PRSR bit is masked.
When IM13 = 1, SFCO bit is masked.
: Rx DMA CONTROLLER FIFO OVERLOAD
: Tx DMA CONTROLLER FIFO OVERLOAD
: TIMER
: Pseudo Random Sequence Recovered
: Sequence Fault Counter Overload
RxFWAR = 1, Rx DMA CONTROLLER has generated an interrupt, its fifo is 3/4 completed.
RxFOV = 1, Rx DMA CONTROLLER has generated an interrupt, it cannot transfer data from
Rx HDLC to external memory, its fifo is completed.
TxFWAR = 1, Tx DMA CONTROLLER has generated an interrupt, its fifo is 3/4 completed.
TxFOV = 1, Tx DMA CONTROLLER has generated an interrupt, it cannot transfer data from
Tx HDLC to external memory, its fifo is completed.
INTFWAR = 1, INTERRUPT CONTROLLER has generated an interrupt, its fifo is 3/4 com-
pleted.
INTFOV = 1, INTERRUPT CONTROLLER has generated an interrupt, it cannot transfer sta-
tus from DMA and GCI controllers to external memory, its internal fifo is completed.
TIM = 1, the programmable timer has generated an interrupt.
PRSR = 1,the Pseudo Random Sequence transmitted by the generator has been recovered
by the analyser.
SFCO = 1, the Fault Counter has reached the value FFFF(H).
IM13
IM12
IM11
IM10
IM9
After reset (FFFF)
bit8
IM8
IM7
bit7
H
IM6
IM5
IM4
IM3
IM2
IM1
IMR (3A)
bit0
IM0
H