M29W256GH7AN6E NUMONYX, M29W256GH7AN6E Datasheet - Page 41

• Manufacturer Part Number: M29W256GH7AN6E
• Description: Flash Mem Parallel 3V/3.3V 256M-Bit 32M x 8/16M x 16 70ns 56-Pin TSOP Tray
• Manufacturer: NUMONYX

Specifications of M29W256GH7AN6E

• Package: 56TSOP
• Cell Type: NOR
• Density: 256 Mb
• Architecture: Sectored
• Block Organization: Symmetrical
• Location Of Boot Block: Bottom|Top
• Typical Operating Supply Voltage: 3|3.3 V
• Sector Size: 128KByte x 256
• Timing Type: Asynchronous
• Operating Temperature: -40 to 85 °C
• Interface Type: Parallel

Enhanced Buffered Exit command
The Enhanced Buffered Exit command is used to return the device to read mode; before
this command any other command, except the Enhanced Buffered Program command set,
is ignored. Two bus write operations are required to issue the command.
Enhanced Buffered Program command
The Enhanced Buffered Program command, available only in x 16 mode, makes use of the
device's 256-word write buffer to speed up programming. 256 words can be loaded into the
write buffer. Each write buffer has the same A23-A8 addresses. The Enhanced Buffered
Program command dramatically reduces system programming time compared to both the
standard non-buffered Program command and the Write to Buffer command.
When issuing an Enhanced Buffered Program command, the VPP/WP pin can be either
held High, VIH, or raised to VPPH (see
endurance cycles
(See
Note that address/data cycles must be loaded in an increasing address order (from
ADD[7:0]=00000000 to ADD[7:0]=11111111) and completely (all 256 words). Invalid address
combinations or failing to follow the correct sequence of bus write cycles will abort the
enhanced buffered program.
The status register bits DQ1, DQ5, DQ6, and DQ7 can be used to monitor the device status
during an enhanced buffered program operation.
An external supply (12 V) can be used to improve programming efficiency.
It is possible to detect program operation fails when changing programmed data from '0' to
'1', that is when reprogramming data in a portion of memory already programmed. The
resulting data will be the logical OR between the previous and the current value.
See
a suggested flowchart on using the Enhanced Buffered Program command.
Enhanced Buffered Program Abort Reset command
After an enhanced buffered program abort the memory does not accept any other
command; in order to reset the device from the abort must be issued an Enhanced Buffered
Program Abort Reset. After the Enhanced Buffered Program Abort Reset command the
memory waits for one of the Enhanced Buffered Program command set.
Appendix D
Enhanced Buffered Program command is accepted only after Enhanced Buffered Entry
command.
Only one bus write cycle is needed to set up the Enhanced Buffered Program
command. The setup code can be addressed to any location within the targeted block.
The second bus write cycle loads the first address and data to be programmed. There
a total of 256 address and data loading cycles.
Once the 256 words are loaded to the buffer a further bus write is needed to program
the content of the write buffer.
Once Enhanced Buffered Program is completed Enhanced Buffered Exit command is
required to return to read mode.
Table 18: Enhanced buffered program commands, 16-bit mode
and
for details on typical enhanced buffered program times in both cases).
Figure 30: Enhanced buffered program flowchart and
Table 21: Program/erase times and program/erase
for more details);
pseudocode, for
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