M29W256GH7AN6E NUMONYX, M29W256GH7AN6E Datasheet - Page 31

• Manufacturer Part Number: M29W256GH7AN6E
• Description: Flash Mem Parallel 3V/3.3V 256M-Bit 32M x 8/16M x 16 70ns 56-Pin TSOP Tray
• Manufacturer: NUMONYX

Specifications of M29W256GH7AN6E

• Package: 56TSOP
• Cell Type: NOR
• Density: 256 Mb
• Architecture: Sectored
• Block Organization: Symmetrical
• Location Of Boot Block: Bottom|Top
• Typical Operating Supply Voltage: 3|3.3 V
• Sector Size: 128KByte x 256
• Timing Type: Asynchronous
• Operating Temperature: -40 to 85 °C
• Interface Type: Parallel

6.1.7
6.1.8
During erase suspend a bus read operation to the extended memory block will output the
extended memory block data. Once in the extended block mode, the Exit Extended Block
command must be issued before the erase operation can be resumed.
The Erase Suspend command is ignored if written during chip erase operations.
Refer to
of block erase timeout and block erase suspend latency time.
If the erase suspend operation is aborted by performing a reset or powering down the
device, data integrity cannot be ensured, and it is recommended to erase again the blocks
suspended.
Erase Resume command
The Erase Resume command is used to restart the program/erase controller after an erase
suspend.
The device must be in read array mode before the Resume command will be accepted. An
erase can be suspended and resumed more than once.
Program command
The Program command can be used to program a value to one address in the memory
array at a time. The command requires four bus write operations, the final write operation
latches the address and data in the internal state machine and starts the program/erase
controller.
Programming can be suspended and then resumed by issuing a Program Suspend
command and a Program Resume command, respectively (see
Suspend command
If the address falls in a protected block then the program command is ignored, the data
remains unchanged. The status register is never read and no error condition is given.
After programming has started, bus read operations output the status register content. See
Figure 16: Write enable controlled program waveforms (8-bit mode)
enable controlled program waveforms (16-bit mode)
are given in
After the program operation has completed the memory will return to the read mode, unless
an error has occurred. When an error occurs, bus read operations to the memory continue
to output the status register. A Read/Reset command must be issued to reset the error
condition and return to read mode.
One of the erase commands must be used to set all the bits in a block or in the whole
memory from ’0’ to ’1’.
The program operation is aborted by performing a reset or powering-down the device. In
this case data integrity cannot be ensured, and it is recommended to reprogram the word or
byte aborted.
Table 21: Program/erase times and program/erase endurance cycles
Table 21: Program/erase times and program/erase endurance
and
Section 6.1.10: Program Resume
for more details. Typical program times
command).
Section 6.1.9: Program
and
Figure 17: Write
cycles.
for the values
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