DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 88
DS33R41
Manufacturer Part Number
DS33R41
Description
Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33R41.pdf
(335 pages)
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10.13 G.706 Intermediate CRC-4 Updating (E1 Mode Only)
The device can implement the G.706 CRC-4 recalculation at intermediate path points. When this mode is enabled,
the data stream presented at TSERI already has the FAS/NFAS, CRC multiframe alignment word, and CRC-4
checksum in time slot 0. The user can modify the Sa bit positions. This change in data content is used to modify
the CRC-4 checksum. This modification, however, does not corrupt any error information the original CRC-4
checksum may contain. In this mode of operation, TSYNC must be configured to multiframe mode. The data at
TSERI must be aligned to the TSYNC signal. If TSYNC is an input, then the user must assert TSYNC aligned at
the beginning of the multiframe relative to TSERI. If TSYNC is an output, the user must multiframe-align the data
presented to TSERI.
Figure 10-5. CRC-4 Recalculate Method
TPOSO/TNEGO
INSERT
NEW CRC-4
CODE
EXTRACT
OLD CRC-4
CODE
+
CRC-4
CALCULATOR
88 of 335
XOR
NEW Sa BIT
DATA
MODIFY
Sa BIT
POSITIONS
TSER
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