DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 300
DS33R41
Manufacturer Part Number
DS33R41
Description
Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33R41.pdf
(335 pages)
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13.3 E1 Mode
Figure 13-14. Receive Side Timing
NOTES:
1) RSYNC in frame mode (TR.IOCR1.5 = 0).
2) RSYNC in multiframe mode (TR.IOCR1.5 = 1).
3) This diagram assumes the CAS MF begins in the RAF frame.
(With Elastic Store Enabled)
NOTES:
1) Data from the E1 channels 1, 5, 9, 13, 17, 21, 25, and 29 is dropped (channel 2 from the E1 link is mapped to
2) RSYNC in the output mode (TR.IOCR1.4 = 0).
3) RSYNC in the input mode (TR.IOCR1.4 = 1).
4) RCHBLK is programmed to block channel 24.
Figure 13-15. Receive Side Boundary Timing, RSYSCLK = 1.544MHz
channel 1 of the T1 link, etc.) and the F-bit position is added (forced to one).
RFSYNC
RSYNC
RSYNC
FRAME#
RCHBLK
RSYSCLK
RMSYNC
RCHCLK
RSYNC
RSYNC
RSERO
2
1
3
1
2
4
1
2
CHANNEL 23/31
3
4
LSB
5
MSB
6
7
300 of 335
8
CHANNEL 24/32
9
10
11
LSB
12
F
MSB
13
14
CHANNEL 1/2
15
16
1
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