DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 245
DS33R41
Manufacturer Part Number
DS33R41
Description
Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33R41.pdf
(335 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 4: Receive Level Threshold Bits (RLT3 to RLT0)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 4 to 0: Transmit Channel Monitor Bits (TCM4 to TCM0). TCM0 is the LSB of a 5-bit channel select that
determines which transmit channel data appear in the TR.TDS0M register.
RLT3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
RLT3
RLT2
—
7
0
7
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TR.CCR4
Common Control Register 4
73h
TR.TDS0SEL
Transmit Channel Monitor Select
74h
RLT2
RLT1
—
6
0
6
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
RLT1
RLT0
—
5
0
5
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
245 of 335
Receive Level (dB)
TCM4
RLT0
Greater than -2.5
Less than -37.5
4
0
4
0
-10.0
-12.5
-15.0
-17.5
-20.0
-22.5
-25.0
-27.5
-30.0
-32.5
-35.0
-2.5
-5.0
-7.5
TCM3
—
3
0
3
0
TCM2
—
2
0
2
0
TCM1
—
1
0
1
0
TCM0
—
0
0
0
0
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