DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 288
DS33R41
Manufacturer Part Number
DS33R41
Description
Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33R41.pdf
(335 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 5: Error Insert Bits 2 to 0 (EIB2 to EIB0). Automatically inserts bit errors at the prescribed rate into the
generated data pattern. Can be used for verifying error-detection features.
Bit 4: Single Bit-Error Insert (SBE). A low-to-high transition creates a single-bit error. Must be cleared and set
again for a subsequent bit error to be inserted.
Bits 3 to 0: Repetitive Pattern Length Bit 3 (RPL3 to RPL0). RPL0 is the LSB and RPL3 is the MSB of a nibble
that describes how long the repetitive pattern is. The valid range is 17 (0000) to 32 (1111). These bits are ignored if
the receive BERT is programmed for a pseudorandom pattern. To create repetitive patterns fewer than 17 bits in
length, the user must set the length to an integer number of the desired length that is less than or equal to 32. For
example, to create a 6-bit pattern, the user can set the length to 18 (0001) or to 24 (0111) or to 30 (1101).
EIB2
Length
0
0
0
0
1
1
1
1
(bits)
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
EIB1
0
0
1
1
0
0
1
1
EIB2
7
0
RPL3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
EIB0
0
1
0
1
0
1
0
1
TR.BC2
BERT Control Register 2
E1h
RPL2
EIB1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
6
0
No errors automatically inserted
10E-1
10E-2
10E-3
10E-4
10E-5
10E-6
10E-7
RPL1
Error Rate Inserted
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
EIB0
5
0
RPL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
288 of 335
SBE
4
0
RPL3
3
0
RPL2
2
0
RPL1
1
0
RPL0
0
0
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