DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 43
DS33R41
Manufacturer Part Number
DS33R41
Description
Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33R41.pdf
(335 pages)
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9.7 Serial Interface
The Serial Interface consists of physical serial port, IMUX/IBO Formatter, and HDLC/X.86 engine. The Serial
Interface supports time-division multiplexed serial data, in a format compatible with Dallas Semiconductor’s
8.192Mbps Channel Interleaved Bus Operation (IBO). The Serial Interface receives and transmits the
encapsulated Ethernet packets. The physical interface consists of Transmit Data, Transmit Clock, Transmit
Synchronization, Receive Data, Receive Clock, and Receive Synchronization. The Serial Interface can be
seamlessly connected to the IBO bus of the four integrated Single-Chip Transceivers (SCTs).
9.8 Link Aggregation (IMUX)
The DS33R41 has a link aggregation feature that allows data from the Ethernet interface to be inverse-multiplexed
over up to four aggregated T1/E1 links. The T1/E1 data streams are input and output from the device on an
8.192Mbps Interleaved Bus (IBO). The IMUX function is shown graphically in
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Byte-aligned data is always input through the RSERI pin at a rate of 8.192Mbps. RSYNC is an 8kHz
reference input used to determine the position of channel 1 for the first T1/E1 link. Note that if the
device is configured to use less than four T1/E1 links, the time slots on the RSERI input to the Ethernet
Mapper associated with the unused links must be all 1s.
Data on the IBO bus is byte-interleaved (by channel) for up to 4 T1/E1 interfaces, and is “byte-striped”
across the available links. The Channel 1 byte arrives (MSB first) for all four T1/E1 links, followed by
the Channel 2 byte for all four T1/E1 links, etc.
Channel 1 is never used for data. In T1 mode, channels 5, 9, 13, 17, 21, 25, 29 are also not used for
data. Bytes for all unused timeslots will be replaced with FFh. All four TDM links must be configured for
T1 operation, or all 4 links must be configured for E1 operation.
Channel 2 is a reserved for link management and coordination. This timeslot is used for inter-node
communication to initiate, control, and monitor the IMUX function. The IMUX operation is initiated with
a handshaking procedure and if successful, followed by a data phase. There is no data transfer during
the handshaking phase. During data transfer, channel 2 is used to provide frame sequence numbers.
The receiver uses the sequence numbers (0-63) to reassemble the frames to compensate for a
differential delay of up to 7.75ms. If the differential delay exceeds 7.75ms, packet errors will occur.
Byte-aligned data is output on the TSERO pin at a rate of 8.192Mbps. TSYNC is used as an 8kHz
synchronization for the TSERO data and is used to determine the position of channel 1 for the first
T1/E1 link. If the device is configured to use less than four T1/E1 links, data bytes on TSERO
associated with the unused links are set to FFh.
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Figure 9-3
and
Figure
9-4.
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