DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 319

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

14.9 JTAG Interface Timing
Table 14-14. JTAG Interface
(V
Figure 14-13. JTAG Interface Timing
JTCLKn Clock Period
JTCLKn Clock High:Low Time
JTCLKn to JTDIn, JTMSn Setup Time
JTCLKn to JTDIn, JTMSn Hold Time
JTCLKn to JTDOn Delay
JTCLKn to JTDOn HIZ Delay
JTRSTn Width Low Time
Note 1:
Note 2:
DD
= 3.3V ±5%, T
Timing parameters in this table are guaranteed by design (GBD).
Clock can be stopped high or low.
JTDIn, JTMSn,
PARAMETER
JTRSTn
JTCLKn
JTRST n
JTD0n
A
= -40°C to +85°C.)
CAPACITIVE TEST LOADS ARE 40pF FOR BUS SIGNALS, 20pF FOR ALL OTHERS.
t6
t7
t2
SYMBOL
(Figure
t2:t3
t1
t4
t5
t6
t7
t8
319 of 335
t4
14-13)
t1
(Note 1)
(Notes 1, 2)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
t5
CONDITIONS
t3
t8
MIN
100
50
2
2
2
2
1000
TYP
500
MAX
50
50
UNITS
ns
ns
ns
ns
ns
ns
ns