ADSP-21469KBCZ-3 Analog Devices Inc, ADSP-21469KBCZ-3 Datasheet - Page 61

• Manufacturer Part Number: ADSP-21469KBCZ-3
• Description: 400MHz SHARC Processor W/5 Mbits Ram
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21469KBCZ-3

• Interface: DAI, DPI, EBI/EMI, I²C, SCI, SPI, SSP, UART/USART
• Clock Rate: 400MHz
• Non-volatile Memory: External
• On-chip Ram: 5Mb
• Voltage - I/o: 3.30V
• Voltage - Core: 1.05V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 324-BGA, 324-CSP
• Package: 324CSP-BGA
• Numeric And Arithmetic Format: Floating-Point
• Maximum Speed: 400 MHz
• Ram Size: 640 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.1
1.3
1.2
1.0
0.9
0.8
0.7
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.4
0
0
Figure 55. Typical Output Rise/Fall Delay DDR Pad D
Figure 56. Typical Output Rise/Fall Delay DDR Pad C
TYPE C FULL DRIVE (RISE & FALL)
TYPE D FULL DRIVE COMP (RISE)
TYPE D HALF DRIVE COMP (FALL)
TYPE D HALF DRIVE TRUE (FALL)
TYPE C HALF DRIVE (FALL)
5
5
y = 0.0007x + 0.9841
y = 0.0022x + 2.1499
y = 0.0046x + 1.0577
y = 0.0123x + 2.3194
10
10
TYPE D FULL DRIVE TRUE (RISE & FALL)
(V
TYPE D FULL DRIVE COMP (FALL )
(V
LOAD CAPACITANCE (pF)
DD_EXT
DD_EXT
15
15
LOAD CAPACITANCE (pF)
y = 0.0022x + 2.2027
= Max)
= Min)
20
20
TYPE D HALF DRIVE TRUE (RISE)
TYPE D HALF DRIVE COMP (RISE)
TYPE C HALF DRIVE (RISE)
y = 0.0032x + 1.0622
y = 0.0077x + 2.2912
y = 0.0077x + 2.2398
25
25
30
30
Rev. 0 | Page 61 of 72 | June 2010
35
35
THERMAL CHARACTERISTICS
The ADSP-21469 processor is rated for performance over the
temperature range specified in
Page
Table 56
JESD51-2 and JESD51-6, and the junction-to-board measure-
ment complies with JESD51-8. Test board design complies with
JEDEC standards JESD51-7 (CSP_BGA). The junction-to-case
measurement complies with MIL- STD-883. All measurements
use a 2S2P JEDEC test board.
To determine the junction temperature of the device while on
the application PCB use:
T
where:
T
package

is the typical value from
P
Values of 
design considerations. 
mation of T
where:
T
Values of 
design considerations when an external heat sink is required.
D
J
CASE
A
JT
= junction temperature (°C)
= power dissipation
= ambient temperature °C
= junction-to-top (of package) characterization parameter
1.3
1.2
1.1
1.0
0.9
0.8
1.4
17.
= case temperature (°C) measured at the top center of the
0
TYPE D HALF DRIVE COMP (FALL)
TYPE D HALF DRIVE TRUE (FALL)
airflow measurements comply with JEDEC standards
TYPE D FULL DRIVE COMP (RISE)
Figure 57. Typical Output Rise/Fall Delay DDR Pad D
JA
JC
J
by the equation:
y = 0.0047x + 1.1884
y = 0.0007x + 1.0964
are provided for package comparison and PCB
are provided for package comparison and PCB
5
T
J
T
=
10
J
TYPE D FULL DRIVE TRUE (RISE & FALL)
=
JA
TYPE D FULL DRIVE COMP (FALL)
T
Table
LOAD CAPACITANCE (pF)
(V
CASE
T
can be used for a first order approxi-
DD_EXT
A
y = 0.0008x + 1.1074
15
+
56.
Operating Conditions on
+

= Max)


JA

20
JT

TYPE D HALF DRIVE TRUE (RISE)
TYPE D HALF DRIVE COMP (RISE)
P

D
P

ADSP-21469
y = 0.003x + 1.1758
D
y = 0.0031x + 1.1599
25

30
35