ADSP-21469KBCZ-3 Analog Devices Inc, ADSP-21469KBCZ-3 Datasheet - Page 19

• Manufacturer Part Number: ADSP-21469KBCZ-3
• Description: 400MHz SHARC Processor W/5 Mbits Ram
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21469KBCZ-3

• Interface: DAI, DPI, EBI/EMI, I²C, SCI, SPI, SSP, UART/USART
• Clock Rate: 400MHz
• Non-volatile Memory: External
• On-chip Ram: 5Mb
• Voltage - I/o: 3.30V
• Voltage - Core: 1.05V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 324-BGA, 324-CSP
• Package: 324CSP-BGA
• Numeric And Arithmetic Format: Floating-Point
• Maximum Speed: 400 MHz
• Ram Size: 640 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Total Power Dissipation
Total power dissipation has two components:
Internal power consumption also comprises two components:
External power consumption is due to the switching activity of
the external pins.
Table 12. I
1
T
–45
–35
–25
–15
–5
5
15
25
35
45
55
65
75
85
95
105
115
125
Valid temperature and voltage ranges are model-specific. See
J
1. Internal power consumption
2. External power consumption
1. Static, due to leakage current.
2. Dynamic (I
(°C)
rent consumption (I
temperature (T
acteristics and activity level of the processor. The activity
level is reflected by the Activity Scaling Factor (ASF), which
represents application code running on the processor core
and having various levels of peripheral and external port
activity
lated by scaling the specific application by the ASF and
using baseline dynamic current consumption as a
reference.
1
DD-STATIC
(Table
0.95 V
72
79
89
101
115
134
158
186
218
258
305
360
424
502
586
692
806
939
DD-DYNAMC
11). Dynamic current consumption is calcu-
J
) and core voltage (V
(mA)
DD-STATIC
), due to transistor switching char-
Table 12
) as a function of junction
1.0 V
91
99
109
122
140
162
189
222
259
305
359
421
496
580
683
794
921
1070
DD_INT
shows the static cur-
).
Operating Conditions on Page
Rev. 0 | Page 19 of 72 | June 2010
1.05 V
110
119
131
145
166
192
223
260
302
354
413
484
566
660
768
896
1036
1198
V
DD_INT
The ASF is combined with the CCLK frequency and V
dependent data in
part is due to transistor switching in the peripheral clock
(PCLK) domain, which is included in the I
equation.
Table 11. Activity Scaling Factors (ASF)
1
2
Activity
Idle
Low
High
Peak
Peak-typical (50:50)
Peak-typical (60:40)
Peak-typical (70:30)
See Estimating Power for SHARC Processors (EE-348) for more information on
Ratio of continuous instruction loop (core) to DDR2 control code reads:writes.
17.
the explanation of the power vectors specific to the ASF table.
(V)
1
1.10 V
140
149
163
182
206
237
273
318
367
428
497
578
674
783
912
1054
1220
1404
Table 13
2
to calculate this part. The second
Scaling Factor (ASF)
0.38
0.58
1.23
1.35
0.87
0.94
1.00
1.15 V
167
181
198
220
249
284
326
377
434
503
582
675
781
904
1048
1212
1394
1601
1
DD_INT
ADSP-21469
specification
DD_INT