ADSP-21469KBCZ-3 Analog Devices Inc, ADSP-21469KBCZ-3 Datasheet - Page 32

• Manufacturer Part Number: ADSP-21469KBCZ-3
• Description: 400MHz SHARC Processor W/5 Mbits Ram
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21469KBCZ-3

• Interface: DAI, DPI, EBI/EMI, I²C, SCI, SPI, SSP, UART/USART
• Clock Rate: 400MHz
• Non-volatile Memory: External
• On-chip Ram: 5Mb
• Voltage - I/o: 3.30V
• Voltage - Core: 1.05V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 324-BGA, 324-CSP
• Package: 324CSP-BGA
• Numeric And Arithmetic Format: Floating-Point
• Maximum Speed: 400 MHz
• Ram Size: 640 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADSP-21469
DDR2 SDRAM Write Cycle Timing
Table 29. DDR2 SDRAM Write Cycle Timing, V
1
2
Parameter
Switching Characteristics
t
t
t
t
t
t
t
t
t
t
t
t
t
t
In order to ensure proper operation of the DDR2, all the DDR2 guidelines have to be strictly followed (see Engineer-to-Engineer Note No: EE-349).
Write command to first DQS delay = WL
CK
CH
CL
DQSS
DS
DH
DSS
DSH
DQSH
DQSL
WPRE
WPST
AS
AH
2
Clock Cycle Time
Minimum Clock Pulse Width
Maximum Clock Pulse Width
DQS Latching Rising Transitions to Associated Clock
Edges
Last Data Valid to DQS Delay
DQS to First Data Invalid Delay
DQS Falling Edge to Clock Setup Time
DQS Falling Edge Hold Time From CK
DQS Input HIGH Pulse Width
DQS Input LOW Pulse Width
Write Preamble
Write Postamble
Control/address Maximum Delay From DDCK Rise
Control/Address Minimum Delay From DDCK Rise
DDR2_DATA/DM
DDR2_ADDR
DDR2_DQSn
DDR2_CLKx
DDR2_CTL
×
t
CK
+ t
DQSS
.
t
CH
Figure 19. DDR2 SDRAM Controller Output AC Timing
t
DD-DDR2
CK
Rev. 0 | Page 32 of 72 | June 2010
t
AS
t
WPRE
t
DQSS
t
CL
Nominal 1.8 V
t
DS
t
AH
t
DH
Min
4.8
2.35
2.35
–0.4
0.6
0.65
1.95
2.05
2.05
2.0
0.8
0.5
1.85
1.0
t
DSH
200 MHz
t
DSS
t
Max
2.75
2.75
0.4
DQSL
1
t
DQSH
Min
4.22
2.05
2.05
–0.45
0.5
0.55
1.65
1.8
1.65
1.65
0.8
0.5
1.65
0.9
225 MHz
t
WPST
Max
2.45
2.45
0.45
1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
ns
ns
CK
CK