ADSP-21469KBCZ-3 Analog Devices Inc, ADSP-21469KBCZ-3 Datasheet - Page 57

• Manufacturer Part Number: ADSP-21469KBCZ-3
• Description: 400MHz SHARC Processor W/5 Mbits Ram
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21469KBCZ-3

• Interface: DAI, DPI, EBI/EMI, I²C, SCI, SPI, SSP, UART/USART
• Clock Rate: 400MHz
• Non-volatile Memory: External
• On-chip Ram: 5Mb
• Voltage - I/o: 3.30V
• Voltage - Core: 1.05V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 324-BGA, 324-CSP
• Package: 324CSP-BGA
• Numeric And Arithmetic Format: Floating-Point
• Maximum Speed: 400 MHz
• Ram Size: 640 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Universal Asynchronous Receiver-Transmitter
(UART) Ports—Receive and Transmit Timing
For information on the UART port receive and transmit opera-
tions, see the ADSP-214xx SHARC Hardware Reference Manual.
2-Wire Interface (TWI)—Receive and Transmit Timing
For information on the TWI receive and transmit operations,
see the ADSP-214xx SHARC Hardware Reference Manual.
JTAG Test Access Port and Emulation
Table 54. JTAG Test Access Port and Emulation
1
2
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristics
t
t
System Inputs = AMI_DATA, DDR2_DATA, CLKCFG1-0, BOOTCFG2-0 RESET, DAI, DPI, FLAG3-0.
System Outputs = AMI_ADDR/DATA, DDR2_ADDR/DATA, AMI_CTRL, DDR2_CTRL, DAI, DPI, FLAG3-0, EMU.
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
DTDO
DSYS
1
1
2
OUTPUTS
SYSTEM
SYSTEM
INPUTS
TMS
TDO
TCK
TDI
TCK Period
TDI, TMS Setup Before TCK High
TDI, TMS Hold After TCK High
System Inputs Setup Before TCK High
System Inputs Hold After TCK High
TRST Pulse Width
TDO Delay from TCK Low
System Outputs Delay After TCK Low
t
DTDO
t
TCK
Figure 43. IEEE 1149.1 JTAG Test Access Port
t
t
DSYS
SSYS
t
STAP
Rev. 0 | Page 57 of 72 | June 2010
t
HTAP
t
HSYS
Min
20
5
6
7
18
4 × t
CK
Max
10
t
CK
÷ 2 + 7
ADSP-21469
Unit
ns
ns
ns
ns
ns
ns
ns
ns