ADSP-21469KBCZ-3 Analog Devices Inc, ADSP-21469KBCZ-3 Datasheet - Page 29

• Manufacturer Part Number: ADSP-21469KBCZ-3
• Description: 400MHz SHARC Processor W/5 Mbits Ram
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21469KBCZ-3

• Interface: DAI, DPI, EBI/EMI, I²C, SCI, SPI, SSP, UART/USART
• Clock Rate: 400MHz
• Non-volatile Memory: External
• On-chip Ram: 5Mb
• Voltage - I/o: 3.30V
• Voltage - Core: 1.05V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 324-BGA, 324-CSP
• Package: 324CSP-BGA
• Numeric And Arithmetic Format: Floating-Point
• Maximum Speed: 400 MHz
• Ram Size: 640 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Precision Clock Generator (Direct Pin Routing)
This timing is only valid when the SRU is configured such that
the precision clock generator (PCG) takes its inputs directly
from the DAI pins (via pin buffers) and sends its outputs
directly to the DAI pins. For the other cases, where the PCG’s
Table 26. Precision Clock Generator (Direct Pin Routing)
1
Parameter
Timing Requirements
t
t
t
Switching Characteristics
t
t
t
t
D = FSxDIV, PH = FSxPHASE. For more information, see the ADSP-214xx SHARC Processor Hardware Reference, “Precision Clock Generators”
chapter.
Normal mode of operation.
PCGIW
STRIG
HTRIG
DPCGIO
DTRIGCLK
DTRIGFS
PCGOW
1
Input Clock Period
PCG Trigger Setup Before Falling Edge of PCG Input
Clock
PCG Trigger Hold After Falling Edge of PCG Input
Clock
PCG Output Clock and Frame Sync Active Edge Delay
After PCG Input Clock
PCG Output Clock Delay After PCG Trigger
PCG Frame Sync Delay After PCG Trigger
Output Clock Period
PCK_CLKx_O
PCG_TRIGx_I
PCG_EXTx_I
PCG_FSx_O
DAI_Pm
DPI_Pm
(CLKIN)
DAI_Pn
DPI_Pn
DAI_Py
DPI_Py
DAI_Pz
DPI_Pz
t
STRIG
Figure 16. Precision Clock Generator (Direct Pin Routing)
Rev. 0 | Page 29 of 72 | June 2010
t
DPCGIO
t
DTRIGCLK
t
HTRIG
t
DTRIGFS
Min
t
4.5
3
2.5
2.5 + (2.5 × t
2.5 + ((2.5 + D – PH) × t
2 × t
PCLK
× 4
PCGIP
inputs and outputs are not directly routed to/from DAI pins (via
pin buffers) there is no timing data available. All timing param-
eters and switching characteristics apply to external DAI pins
(DAI_P01 – DAI_P20).
– 1
PCGIP
t
DPCGIO
t
)
PCGIW
PCGIP
)
t
PCGOW
Max
10
10 + (2.5 × t
10 + ((2.5 + D – PH) × t
PCGIP
)
ADSP-21469
PCGIP
)
Unit
ns
ns
ns
ns
ns
ns
ns