DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 88

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 2 CPU
Table 2.4
(10) Immediate Data
Byte immediate data is located in an instruction code. Word or longword immediate data is not
located in instruction codes but in a memory table. The memory table is accessed by an immediate
data transfer instruction (MOV) using the PC relative addressing mode with displacement.
With the SH-2A, 17- to 28-bit immediate data can be located in an instruction code. However, for
21- to 28-bit immediate data, an OR instruction must be executed after the data is transferred to a
register.
Table 2.5
Note: @(disp, PC) accesses the immediate data.
Rev. 3.00 Sep. 28, 2009 Page 56 of 1650
REJ09B0313-0300
SH-2A CPU
CMP/GE
BT
BF
ADD
CMP/EQ
BT
Classification
8-bit immediate
16-bit immediate
20-bit immediate
28-bit immediate
32-bit immediate
R1,R0
TRGET0
TRGET1
#−1,R0
#0,R0
TRGET
T Bit
Immediate Data Accessing
SH-2A CPU
MOV
MOVI20
MOVI20
MOVI20S
OR
MOV.L
.DATA.L
Description
T bit is set when R0 ≥ R1.
The program branches to TRGET0
when R0 ≥ R1 and to TRGET1
when R0 < R1.
T bit is not changed by ADD.
T bit is set when R0 = 0.
The program branches if R0 = 0.
#H'12,R0
#H'1234,R0
#H'12345,R0
#H'12345,R0
#H'67,R0
@(disp,PC),R0
.................
H'12345678
Example of Other CPU
MOV.B
MOV.W
MOV.L
MOV.L
MOV.L
Example of Other CPU
CMP.W
BGE
BLT
SUB.W
BEQ
#H'12,R0
#H'1234,R0
#H'12345,R0
#H'1234567,R0
#H'12345678,R0
R1,R0
TRGET0
TRGET1
#1,R0
TRGET

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