DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 555

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.4
11.4.1
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
free-running operation, cycle counting, and external event counting.
Each TGR can be used as an input capture register or output compare register.
Always select MTU2 external pins set function using the pin function controller (PFC).
(1)
When one of bits CST0 to CST4 in TSTR is set to 1, the TCNT counter for the corresponding
channel begins counting. TCNT can operate as a free-running counter, periodic counter, for
example.
(a)
Figure 11.4 shows an example of the count operation setting procedure.
Counter Operation
Example of Count Operation Setting Procedure
Operation
Basic Functions
Select counter clearing
Select output compare
Start count operation
Select counter clock
Operation selection
<Periodic counter>
Periodic counter
Figure 11.4 Example of Counter Operation Setting Procedure
Set period
register
source
[1]
[2]
[3]
[4]
[5]
<Free-running counter>
Free-running counter
Start count operation
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
[5]
Rev. 3.00 Sep. 28, 2009 Page 523 of 1650
[1] Select the counter clock
[2] For periodic counter
[3] Designate the TGR
[4] Set the periodic counter
[5] Set the CST bit in TSTR to
with bits TPSC2 to TPSC0
in TCR. At the same time,
select the input clock edge
with bits CKEG1 and
CKEG0 in TCR.
operation, select the TGR
to be used as the TCNT
clearing source with bits
CCLR2 to CCLR0 in TCR.
selected in [2] as an output
compare register by means
of TIOR.
cycle in the TGR selected
in [2].
1 to start the counter
operation.
REJ09B0313-0300

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