DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 187

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.3.2
ICR0 is a 16-bit register that sets the input signal detection mode for the external interrupt input
pin NMI, and indicates the input level at the NMI pin.
Initial value:
Bit
15
14 to 9
8
7 to 0
Note:
R/W:
Bit:
*
1 when the NMI pin is high, and 0 when the NMI pin is low.
Interrupt Control Register 0 (ICR0)
NMIL
Bit Name
NMIL
NMIE
15
R
*
14
R
0
-
13
R
0
-
Initial
Value
*
All 0
0
All 0
12
R
0
-
11
R
0
-
R/W
R
R
R/W
R
10
R
0
-
Description
NMI Input Level
Sets the level of the signal input at the NMI pin. The
NMI pin level can be obtained by reading this bit. This
bit cannot be modified.
0: Low level is input to NMI pin
1: High level is input to NMI pin
Reserved
These bits are always read as 0. The write value should
always be 0.
NMI Edge Select
Selects whether the falling or rising edge of the
interrupt request signal on the NMI pin is detected.
0: Interrupt request is detected on falling edge of NMI
1: Interrupt request is detected on rising edge of NMI
Reserved
These bits are always read as 0. The write value should
always be 0.
R
9
0
-
input
input
NMIE
R/W
8
0
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 155 of 1650
R
6
0
-
Section 6 Interrupt Controller (INTC)
R
5
0
-
R
4
0
-
R
3
0
-
REJ09B0313-0300
R
2
0
-
R
1
0
-
R
0
0
-

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