DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 361
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 9.15 Relationship between BSZ[1:0], A2/3ROW[1:0], A2/3COL[1:0], and Address
Notes: 1. L/H is a bit used in the command specification; it is fixed at low or high according to the
BSZ
[1:0]
10 (16 bits)
Output Pin of
This LSI
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Example of connected memory
256-Mbit product (4 Mwords × 16 bits × 4 banks, column 10 bits product): 1
2. Bank address specification
access mode.
Multiplex Output (5)-2
A2/3
ROW
[1:0]
01 (12 bits)
Row Address
Output Cycle
A27
A26
A25
A24*
A23*
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
2
2
Setting
A2/3
COL
[1:0]
10 (10 bits)
Column Address
Output Cycle
A17
A16
A15
A24*
A23*
A12
L/H*
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
2
2
SDRAM Pin
A13 (BA1)
A12 (BA0)
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Rev. 3.00 Sep. 28, 2009 Page 329 of 1650
Section 9 Bus State Controller (BSC)
Function
Unused
Specifies bank
Address
Specifies
address/precharge
Address
Unused
REJ09B0313-0300
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