DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 287
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DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 287 of 1686
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9.4.3
CSnWCR specifies various wait cycles for memory access. The bit configuration of this register
varies as shown below according to the memory type (TYPE2 to TYPE0) specified by the CSn
space bus control register (CSnBCR). Specify CSnWCR before accessing the target area. Specify
CSnBCR first, then specify CSnWCR.
(1)
• CS0WCR
Initial value:
Initial value:
Bit
31 to 22 ⎯
21, 20
19, 18
17, 16
15 to 13 ⎯
R/W:
R/W:
Normal Space, SRAM with Byte Selection, MPX-I/O
Bit:
Bit:
CSn Space Wait Control Register (CSnWCR) (n = 0 to 7)
Bit Name
⎯*
⎯
⎯*
31
15
R
R
0
0
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
All 0
All 0
All 0
All 0
All 0
R/W
28
12
R
0
0
-
SW[1:0]
R/W
27
11
R
0
0
-
R/W
R
R/W
R
R/W
R
R/W
26
10
R
0
1
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Reserved
Set these bits to 0 when the interface for normal space
is used.
Reserved
These bits are always read as 0. The write value
should always be 0.
Reserved
Set these bits to 0 when the interface for normal space
is used.
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W
25
R
0
9
0
-
WR[3:0]
R/W
24
R
0
8
1
-
R/W
23
R
0
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 255 of 1650
R/W
WM
22
R
0
6
0
-
Section 9 Bus State Controller (BSC)
R/W
21
R
0
5
0
-
-
R/W
20
R
0
4
0
-
-
19
R
R
0
3
0
-
-
REJ09B0313-0300
18
R
R
0
2
0
-
-
R/W
R/W
17
0
1
0
-
HW[1:0]
R/W
R/W
16
0
0
0
-
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