DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1191
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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23.3.32 Pipe Configuration Register (PIPECFG)
PIPECFG is a register that specifies the transfer type, buffer memory access direction, and
endpoint numbers for PIPE1 to PIPE7. It also selects continuous or non-continuous transfer mode,
single or double buffer mode, and whether to continue or disable pipe operation at the end of
transfer.
This register is initialized by a power-on reset or a software reset. Only the TYPE1 and TYPE0
bits are initialized by a USB bus reset.
Initial value:
Bit
15, 14
13 to 11 ⎯
R/W:
Bit:
R/W
Bit Name
TYPE[1:0]
15
TYPE[1:0]
0
R/W
14
0
13
R
0
-
12
Initial
Value
00
All 0
R
0
-
11
R
0
-
R/W
R/W
R
BFRE
R/W
10
0
DBLB CNTMD SHT
R/W
9
0
Description
Transfer Type
•
00: Pipe use disabled
01: Bulk transfer
10: Setting prohibited
11: Isochronous transfer*
•
00: Pipe use disabled
01: Bulk transfer
10: Setting prohibited
11: Setting prohibited
•
00: Pipe use disabled
01: Setting prohibited
10: Interrupt transfer
11: Setting prohibited
Reserved
These bits are always read as 0. The write value
should always be 0.
PIPE1 and PIPE2
PIPE3 to PIPE5
PIPE6 and PIPE7
R/W
8
0
Section 23 USB 2.0 Host/Function Module (USB)
R/W
NAK
7
0
Rev. 3.00 Sep. 28, 2009 Page 1159 of 1650
R
6
0
-
R
5
0
-
R/W
DIR
4
0
R/W
3
0
REJ09B0313-0300
R/W
EPNUM[3:0]
2
0
R/W
1
0
R/W
0
0
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