DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 445

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.3.7
The DMA reload transfer count registers (RDMATCR) are 32-bit readable/writable registers.
When the SAR/DAR reload function is enabled, the RDMATCR value is written to the transfer
count register (DMATCR) at the end of the current DMA transfer. In this case, a new value for the
next DMA transfer can be preset in RDMATCR during the current DMA transfer. When the
SAR/DAR reload function is disabled, RDMATCR is ignored.
The upper eight bits of RDMATCR are always read as 0, and the write value should always be 0.
As in DMATCR, the transfer count is 1 when the setting is H'00000001, 16,777,215 when
H'00FFFFFF is set, and 16,777,216 (the maximum) when H'00000000 is set. To transfer data in
16 bytes, one 16-byte transfer (128 bits) counts one.
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
DMA Reload Transfer Count Registers (RDMATCR)
R/W
31
15
R
0
0
-
-
R/W
30
14
R
0
0
-
-
R/W
29
13
R
0
0
-
-
R/W
28
12
R
0
0
-
-
R/W
27
11
R
0
0
-
-
R/W
26
10
R
0
0
-
-
R/W
25
R
0
9
0
-
-
R/W
24
Section 10 Direct Memory Access Controller (DMAC)
R
0
8
0
-
-
R/W
R/W
23
0
7
0
-
-
Rev. 3.00 Sep. 28, 2009 Page 413 of 1650
R/W
R/W
22
0
6
0
-
-
R/W
R/W
21
0
5
0
-
-
R/W
R/W
20
0
4
0
-
-
R/W
R/W
19
0
3
0
-
-
REJ09B0313-0300
R/W
R/W
18
0
2
0
-
-
R/W
R/W
17
0
1
0
-
-
R/W
R/W
16
0
0
0
-
-