DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1055
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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20.3.1
The sixteen A/D data registers, ADDRA to ADDRH, are 16-bit read-only registers that store the
results of A/D conversion.
An A/D conversion produces 10-bit data, which is transferred for storage into the ADDR
corresponding to the selected channel. The 10 bits of the result are stored in the upper bits (bits 15
to 6) of ADDR. Bits 5 to 0 of ADDR are reserved bits that are always read as 0.
Access to ADDR in 8-bit units is prohibited. ADDR must always be accessed in 16-bit units.
Table 20.3 indicates the pairings of analog input channels and ADDR.
Table 20.3 Analog Input Channels and ADDR
Initial value:
Bit
15 to 6
5 to 0
Analog Input Channel
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
R/W:
Bit:
A/D Data Registers A to H (ADDRA to ADDRH)
Bit Name
⎯
15
R
0
14
R
0
13
R
0
Initial
Value
All 0
All 0
12
R
0
A/D Data Register where Conversion Result is Stored
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
11
R/W
R
R
R
0
10
R
0
Description
Bit data (10 bits)
Reserved
These bits are always read as 0. The write value
should always be 0.
R
9
0
R
8
0
R
7
0
Rev. 3.00 Sep. 28, 2009 Page 1023 of 1650
R
6
0
R
5
0
-
Section 20 A/D Converter (ADC)
R
4
0
-
3
0
R
-
REJ09B0313-0300
2
0
R
-
1
0
R
-
0
0
R
-
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