MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 118
![KIT DEVELOPMENT I.MX53](/photos/39/51/395134/4751369_sml.jpg)
MCIMX53-START
Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets
1.MCIMX53-START.pdf
(2 pages)
2.MCIMX53-START.pdf
(180 pages)
3.MCIMX53-START.pdf
(204 pages)
Specifications of MCIMX53-START
Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Electrical Characteristics
Figure 69
118
Paramete
t2 (write)
ATA
tA
—
—
t1
t9
t3
t4
t0
r
shows timing for PIO write.
from
Parameter
Figure 69
t2w
—
—
—
—
t1
t9
t4
tA
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1
t1(min) = time_1 * T – (tskew1 + tskew2 + tskew5)
t2(min) = time_2w * T – (tskew1 + tskew2 + tskew5)
t9(min) = time_9 * T – (tskew1 + tskew2 + tskew6)
t3(min) = (time_2w – time_on)* T – (tskew1 + tskew2 +tskew5)
t4(min) = time_4 * T – tskew1
tA = (1.5 + time_ax) * T – (tco + tsui + tcable2 + tcable2 + 2*tbuf)
t0(min) = (time_1 + time_2 + time_9) * T
Avoid bus contention when switching buffer on by making ton long enough
Avoid bus contention when switching buffer off by making toff long enough
Figure 69. Multi-word DMA (MDMA) Timing
Table 72. PIO Write Timing Parameters
Table 72
lists the timing parameters for PIO write.
Value
Freescale Semiconductor
If not met, increase
time_1, time_2r,
Controlling
Variable
time_2w
time_2w
time_ax
time_9
time_4
time_9
time_1
—
—
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