MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 117
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MCIMX53-START
Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets
1.MCIMX53-START.pdf
(2 pages)
2.MCIMX53-START.pdf
(180 pages)
3.MCIMX53-START.pdf
(204 pages)
Specifications of MCIMX53-START
Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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4.7.13.1 PIO Mode Read Timing
Figure 68
Freescale Semiconductor
1
Parameter
t2 (read)
Values provided where applicable.
tcable1
tcable2
tskew4
tskew5
tskew6
Name
ATA
tbuf
trd
t1
t9
t5
t6
tA
t0
shows timing for PIO read.
from
Cable propagation delay for ata_data
Cable propagation delay for control signals ata_dior, ata_diow, ata_iordy,
Max difference in cable propagation delay between ata_iordy and ata_data (read)
Max difference in cable propagation delay between (ata_dior, ata_diow,
Max difference in cable propagation delay without accounting for ground bounce
Max buffer propagation delay
ata_dmack
ata_dmack) and ata_cs0, ata_cs1, ata_da2, ata_da1, ata_da0, ata_data(write)
Parameter
Figure 68
trd1
t2r
tA
—
t1
t9
t5
t6
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1
trd1(max) = (–trd)+ (tskew3 + tskew4)
t1(min) = time_1 * T – (tskew1 + tskew2 + tskew5)
t2(min) = time_2r * T – (tskew1 + tskew2 + tskew5)
t9(min) = time_9 * T – (tskew1 + tskew2 + tskew6)
t5(min) = tco + tsu + tbuf + tbuf+ tcable1 + tcable2
0
tA(min) = (1.5 + time_ax) * T – (tco + tsui + tcable2 + tcable2 + 2*tbuf)
trd1(min) = (time_pio_rdx – 0.5)*T – (tsu + thi)
(time_pio_rdx – 0.5) * T > tsu + thi + tskew3 + tskew4
t0(min) = (time_1 + time_2r+ time_9) * T
Table 70. PATA Timing Parameters (continued)
Table 71. PIO Read Timing Parameters
Figure 68. PIO Read Timing Diagram
Table 71
Description
lists the timing parameters for PIO read.
Value
Electrical Characteristics
Contributing Factor
time_1, time_2r, time_9
time_2 (affects tsu and
Transceiver
time_pio_rdx
Controlling
Value/
Cable
Cable
Cable
Cable
Cable
Variable
time_ax
time_2r
time_9
time_1
tco)
—
1
117
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