MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 112

KIT DEVELOPMENT I.MX53

MCIMX53-START

Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets

Specifications of MCIMX53-START

Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX53-START
Manufacturer:
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Part Number:
MCIMX53-START-R
Manufacturer:
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Electrical Characteristics
4.7.11
Figure 62
112
1
2
3
MLBCLK pulse width variation
MLBSIG/MLBDAT output high
impedance from MLBCLK low
MLBSIG/MLBDAT input valid
MLBSIG/MLBDAT input hold
The MLB Controller can shut off MLBCLK to place MediaLB in a low-power state.
Pulse width variation is measured at 1.25 V by triggering on one edge of MLBCLK and measuring the spread on the other
edge, measured in ns peak-to-peak (pp).
The board must be designed to insure that the high-impedance bus does not leave the logic state of the final driven bit for this
time period. Therefore, coupling must be minimized while meeting the maximum capacitive load listed.
One-Wire bus
(BATT_LINE)
MLBCLK cycle time
MLBCLK Operating
MLBCLK high time
MLBCLK rise time
from MLBCLK low
MLBCLK low time
to MLBCLK falling
Bus Hold Time
MLB fall time
Frequency
Parameter
depicts the RPP timing, and
One-Wire (OWIRE) Timing Parameters
1
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1
Figure 62. Reset and Presence Pulses (RPP) Timing Diagram
Table 64. MLB Device 1024 Fs Timing Parameters
Symbol
One-WIRE Tx
“Reset Pulse”
t
t
t
t
t
t
t
t
t
t
dsmcf
dhmcf
mcfdz
f
mpwv
mckh
mdzh
mckc
mckr
mckf
mckl
mck
OW1
Table 65
45.056
Min
6.5
6.1
9.7
9.3
1
0
0
2
t
R
lists the RPP timing parameters.
49.152
20.3
10.6
10.2
Typ
7.7
7.3
49.2544
51.200
Max
t
OW3
0.7
mckl
OW2
One Wire Device Tx
1
1
“Presence Pulse”
Units
ns pp
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
OW4
Max: 1024*fs PLL unlocked
Max: 1024fs*fs at 48.1 kHz
Min: 1024*fs at 44.0 kHz
Typ: 1024*fs at 48.0 kHz
Freescale Semiconductor
PLL unlocked
PLL unlocked
Comment
V
V
IL
IH
Note
Note
TO V
TO V
2
3
IH
IL

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