LFXP2-8E-5FTN256C Lattice, LFXP2-8E-5FTN256C Datasheet - Page 308

• Manufacturer Part Number: LFXP2-8E-5FTN256C
• Description: FPGA - Field Programmable Gate Array 8K LUTs 201I/O Inst- on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-8E-5FTN256C

• Number Of Macrocells: 8000
• Number Of Programmable I/os: 201
• Data Ram Size: 226304
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FTBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 15-12. Decryption Flow
Verifying a Configuration
If the Flash is programmed directly, the data is first decrypted and then the FPGA performs a CRC on the data. If all
CRCs pass, configuration was successful. If a CRC does not pass, the Done fuse is not programmed.
References
• TN1141,
• Federal Information Processing Standard Publication 197, Nov. 26, 2001. Advanced Encryption Standard (AES)
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
e-mail:
Internet:
Revision History
Enter 128-Bit
Enter 64-Bit
Key Code
Key Code
February 2007
May 2008
[phone] (Outside North America)
[e-mail]
www.latticesemi.com
Date
LatticeXP2 sysCONFIG Usage Guide
Notes:
1. Supported on JTAG port.
2. Supported on both JTAG port and slave SPI interface.
Legend
Program, Verify Flash Protect Key Fuses
Program, Verify Decryption Key Fuses
Program, Key Lock (Security) Fuse(s)
Erase All Configuration Flash Fuses
Optional step, dependent on user selection.
Programming the Keys
Done
Start
Version
01.0
01.1
1
Initial release.
Updated ispLEVER Security Settings screen shot.
Enter 64-Bit
Key Code
15-9
Encryption and Security Usage Guide
Erase the Configuration Flash, Usercode
Read In 64-Bit Flash Protect Key
Program Configuration Flash
JEDEC File Programming
Change Summary
Program Security Fuse
Program Done Fuse
Program Usercode
Verify Usercode
Done
Start
LatticeXP2 Configuration
2
Encrypted
JEDEC
File