LFXP2-8E-5FTN256C Lattice, LFXP2-8E-5FTN256C Datasheet - Page 113

• Manufacturer Part Number: LFXP2-8E-5FTN256C
• Description: FPGA - Field Programmable Gate Array 8K LUTs 201I/O Inst- on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-8E-5FTN256C

• Number Of Macrocells: 8000
• Number Of Programmable I/os: 201
• Data Ram Size: 226304
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FTBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 8-9. DRIVE Settings
PULLMODE
The PULLMODE attribute is available for all the LVTTL, LVCMOS and PCI inputs and outputs. This attribute can be
enabled for each I/O independently.
Values: UP, DOWN, NONE, KEEPER
Default: UP
Table 8-10. PULLMODE Values
PCICLAMP
PCI33 inputs on the top and bottom of the device have an optional PCI clamp that is enabled via the PCICLAMP
attribute. The PCICLAMP is also available for all LVCMOS33 and LVTTL inputs.
Values: ON, OFF
Table 8-11. PCICLAMP Values
SLEWRATE
The SLEWRATE attribute is available for all LVTTL and LVCMOS output drivers. Each I/O pin has an individual
slew rate control. This allows a designer to specify slew rate control on a pin-by-pin basis.
Values: FAST, SLOW
Default: FAST
HSTL15_I/ HSTL15D_I
HSTL18_I/ HSTL18D_I
SSTL25_I/ SSTL25D_I
SSTL25_II/ SSTL25D_II
SSTL18_II/SSTL18D_II
LVCMOS12
LVCMOS15
LVCMOS18
LVCMOS25
LVCMOS33
LVTTL
Output Standard
Pull-up (Default)
Pull-down
Bus Keeper
Pull Off
PCI33
LVCMOS33
LVTTL
Input Type
PULL Options
8-9
4, 8, 12, 16, 20
4, 8, 12, 16, 20
4, 8, 12, 16, 20
DRIVE (mA)
4, 8, 12, 16
PCICLAMP Value
ON (default), OFF
OFF (default), ON
OFF (default), ON
PULLMODE Value
16, 20
8, 12
8, 12
8, 12
4, 8
2, 6
4, 8
KEEPER
DOWN
NONE
UP
LatticeXP2 sysIO Usage Guide
Default (mA)
12
16
12
12
12
12
12
8
8
6
8