SPEAR300-2 STMicroelectronics, SPEAR300-2 Datasheet - Page 47

• Manufacturer Part Number: SPEAR300-2
• Description: IC MPU ARM9 289LFBGA
• Manufacturer: STMicroelectronics
• Series: SPEAr®r

Specifications of SPEAR300-2

• Processor Type: ARM Microprocessor
• Speed: 333MHz
• Voltage: 1.14 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 289-LFBGA
• Processor Series: SPEAr300
• Core: ARM926EJ-S
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 333 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Data Ram Size: 56 KB
• Interface Type: I2C, UART, USB, Serial
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Program Memory Size: 32 KB
• Program Memory Type: ROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-10849-5

SPEAr300
3.4
Notes/legend for
GPIO (General purpose I/O):
TDM_ : TDM interface signals
SD_ : SDIO interface
IT pins: interrupts
Table cells filled with ‘0’ or ‘1’ are unused and unless otherwise configured as Alternate
function or GPIO, the corresponding pin is held at low or high level respectively by the
internal logic.
Table cells filled with ‘Reserved’ denote pins that must be left unconnected.
Table 12.
PL_GPIO pin sharing for debug modes
In some cases the PL_GPIO pins may be used in different ways for debugging purposes.
There are three different cases (see also
1.
2.
3.
basGPIO: Base GPIOs in the basic subsystem (enabled as alternate functions)
G10 and G8: GPIOs in the RAS subsystem
GPIOx: GPIOs in the independent GPIO block in the RAS subsystem
Case 1 - All the PL_GPIO get values from Boundary scan registers during Ex-test
instruction of JTAG . Typically this configuration is used to verify correctness of the
soldering process during the production flow .
Case 2 - All the PL_GPIO maintain their original meaning but the JTAG Interface is
connected to the processor. This configuration is useful during the development phase
but offers only "static" debug.
Case 3 - Some PL_GPIO, as shown
connect the ETM9 lines to an external box. This configuration is typically used only
during the development phase. It offers a very powerful debug capability. When the
processor reaches a breakpoint it is possible, by analyzing the trace buffer, to
understand the reason why the processor has reached the break.
Table shading
Ethernet MAC
SDIO/MMC
Keyboard
CAMERA
Shading
Table
FSMC
CLCD
UART
GPT
SSP
IrDa
I2C
11:
Doc ID 16324 Rev 2
Table
inTable 13: Ball sharing during
Keyboard pins ROWs are outputs, COLs are inputs
13):
FSMC pins: NAND or NOR Flash
MII/SMII Ethernet Mac pins
Color LCD controller pins
SD card controller pins
Camera pins
UART pins
Pin group
Timer pins
IrDa pins
SSP pins
I2C pins
debug, are used to
Pin description
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