SPEAR300-2 STMicroelectronics, SPEAR300-2 Datasheet - Page 39

• Manufacturer Part Number: SPEAR300-2
• Description: IC MPU ARM9 289LFBGA
• Manufacturer: STMicroelectronics
• Series: SPEAr®r

Specifications of SPEAR300-2

• Processor Type: ARM Microprocessor
• Speed: 333MHz
• Voltage: 1.14 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 289-LFBGA
• Processor Series: SPEAr300
• Core: ARM926EJ-S
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 333 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Data Ram Size: 56 KB
• Interface Type: I2C, UART, USB, Serial
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Program Memory Size: 32 KB
• Program Memory Type: ROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-10849-5

SPEAr300
3.3.3
3.3.4
3.3.5
3.3.6
Mode 13: 8-bit camera with LCD
Main features:
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Alternate functions
Other peripheral functions are listed in the Alternate Functions column of
PL_GPIO multiplexing scheme
Refer to the user manual for the register descriptions.
Boot pins
The status of the boot pins is read at startup by the BootROM. Refer to the description of the
Boot register in the SPEAr300 user manual.
GPIOs
Some PL_GPIO pins can be used as software controlled general purpose I/Os (GPIOs) .
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Multiplexing scheme
The two multiplexers shown in
multiplexer selects the I/O functions of the RAS IPs in one of 13 modes shown in
“Configuration mode” columns in
register 2.
The second multiplexer is controlled by RAS register 1 and allows you to enable the I/O
functions shown in alternate functions column of
To get more information about these registers, please refer to the SPEAr300 user manual.
8-bit camera interface
9x9 keyboard
CLCD controller interface
Digital-to-analog converter (DAC)
I2S block
4 SPI/I2C control signals
TDM block capable of communicating with 2 external devices
SDIO interface supporting SPI, SD1, SD4 and SD8 mode
GPIOs with interrupt capability
6 base GPIOs can be enabled as alternate functions on PL_GPIO.
18 GPIO are provided by the RAS IPs G8 and G10 on PL_GPIO.
18 GPIOs are available if the GPIO/ keyboard controller is configured in GPIO mode.
Doc ID 16324 Rev 2
Figure 4
and can be enabled/disabled using by via RAS register 1.
Table
11). This selection is programmable via 4 bits in RAS
are controlled by different registers. The first
Table
11.
Table 11:
Pin description
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