SPEAR300-2 STMicroelectronics, SPEAR300-2 Datasheet - Page 43

• Manufacturer Part Number: SPEAR300-2
• Description: IC MPU ARM9 289LFBGA
• Manufacturer: STMicroelectronics
• Series: SPEAr®r

Specifications of SPEAR300-2

• Processor Type: ARM Microprocessor
• Speed: 333MHz
• Voltage: 1.14 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 289-LFBGA
• Processor Series: SPEAr300
• Core: ARM926EJ-S
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 333 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Data Ram Size: 56 KB
• Interface Type: I2C, UART, USB, Serial
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Program Memory Size: 32 KB
• Program Memory Type: ROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-10849-5

Table 11.
PL_GPIO_73/A17
PL_GPIO_72/B16
PL_GPIO_71/D14
PL_GPIO_70/C15
PL_GPIO_69/A16
PL_GPIO_68/B15
PL_GPIO_67/C14
PL_GPIO_66/E13
PL_GPIO_65/B14
PL_GPIO_64/D13
PL_GPIO_63/C13
PL_GPIO_62/A15
PL_GPIO_61/E12
PL_GPIO_60/A14
PL_GPIO_59/B13
PL_GPIO_58/D12
PL_GPIO_57/E11
PL_GPIO_56/C12
PL_GPIO_55/A13
PL_GPIO_54/E10
PL_GPIO_53/D11
PL_GPIO_52/B12
PL_GPIO_# /
ball number
PL_GPIO multiplexing scheme (continued)
CL
AL
/W
/R
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A7
A8
A9
/W
/G
2
0
0
0
CLD10
CLD11
CLD12
CLD13
CLD14
CLD15
CLD16
CLD17
CLD18
CLD19
CLD20
CLD21
CLD7
CLD8
CLD9
CLAC
CLCP
CLFP
CL
AL
/W
/R
3
G8_7 (out)
SPI_I2C4
SPI_I2C5
SPI_I2C6
SPI_I2C7
SYNC4
SYNC5
SYNC6
SYNC7
ROW7
ROW8
G10_9
G10_8
G10_7
TDM_
TDM_
TDM_
TDM_
IT0
IT1
IT2
IT3
IT4
IT5
IT6
IT7
4
Configuration mode (enabled by RAS register 2)
CLD10
CLD11
CLD12
CLD13
CLD14
CLD15
CLD16
CLD17
CLD18
CLD19
CLD20
CLD21
CLD22
CLD23
ROW7
ROW8
CLCP
CLD7
CLD8
CLD9
CLAC
CLFP
5
SPI_I2C4
SPI_I2C5
SPI_I2C6
SPI_I2C7
SYNC4
SYNC5
SYNC6
SYNC7
ROW7
ROW8
G10_9
G10_8
G10_7
TDM_
TDM_
TDM_
TDM_
IT0
IT1
IT2
IT3
IT4
IT5
IT6
IT7
6
0
CLD10
CLD11
CLD12
CLD13
CLD14
CLD15
CLD16
CLD17
CLD18
CLD19
CLD20
CLD21
CLD22
CLD23
ROW7
ROW8
CLAC
CLCP
CLD7
CLD8
CLD9
CLFP
7
SPI_I2C4
SPI_I2C5
SPI_I2C6
SPI_I2C7
SYNC4
SYNC5
SYNC6
SYNC7
/DOUT
G10_9
G10_8
G10_7
TDM_
TDM_
TDM_
TDM_
IT0
IT1
IT2
IT3
IT4
IT5
IT6
IT7
A7
/W
/R
8
SPI_I2C4
SPI_I2C5
SPI_I2C6
SPI_I2C7
SYNC4
SYNC5
/DOUT
G10_9
G10_8
G10_7
TDM_
TDM_
IT0
IT1
IT2
IT3
IT4
IT5
IT6
IT7
A7
CL
AL
/W
/R
9
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
ROW7
ROW8
G10_9
G10_8
G10_7
10
HSYNC_1
VSYNC_1
CLD10
CLD11
CLD12
CLD13
CLD14
CLD15
CLD16
CLD17
CLD18
CLD19
CLD20
CLD21
CLD22
CLD23
CLAC
CLCP
CLD7
CLD8
CLD9
CLFP
11
HSYNC_1
VSYNC_1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
G10_9
G10_8
G10_7
12
CLD10
CLD11
CLD12
CLD13
CLD14
CLD15
CLD16
CLD17
CLD18
CLD19
CLD20
CLD21
CLD22
CLD23
ROW7
ROW8
CLD7
CLD8
CLD9
CLAC
CLCP
CLFP
13
register 1)
Alternate
(enabled
function
by RAS