SPEAR300-2 STMicroelectronics, SPEAR300-2 Datasheet - Page 12

• Manufacturer Part Number: SPEAR300-2
• Description: IC MPU ARM9 289LFBGA
• Manufacturer: STMicroelectronics
• Series: SPEAr®r

Specifications of SPEAR300-2

• Processor Type: ARM Microprocessor
• Speed: 333MHz
• Voltage: 1.14 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 289-LFBGA
• Processor Series: SPEAr300
• Core: ARM926EJ-S
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 333 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Data Ram Size: 56 KB
• Interface Type: I2C, UART, USB, Serial
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Program Memory Size: 32 KB
• Program Memory Type: ROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-10849-5

Architecture overview
2.2
2.2.1
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System controller
The System Controller provides an interface for controlling the operation of the overall
system.
Main features:
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Clock and reset system
The clock system is a fully programmable block that generates all the clocks for the
SPEAr300.
The default operating clock frequencies are:
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The above frequencies are the maximum allowed values. The clock frequencies can be
modified by programming the clock system registers.
The clock system consists of 2 main parts: a multi clock generator block and two internal
PLLs.
Power saving system mode control
Crystal oscillator and PLL control
Configuration of system response to interrupts
Reset status capture and soft reset generation
Watchdog and timer module clock enable
Remap control
General purpose peripheral control r
System and peripheral clock control and status
CPU_CLK @ 333 MHz for the CPU.
HCLK @ 166 MHz for AHB bus and AHB peripherals.
PCLK @ 83 MHz for, APB bus and APB peripherals.
DDR_CLK @ 100-333 MHz for DDR memory interface.
Doc ID 16324 Rev 2
SPEAr300