AT91M63200-25AI Atmel, AT91M63200-25AI Datasheet - Page 59

• Manufacturer Part Number: AT91M63200-25AI
• Description: IC ARM7 MCU 176 TQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91M63200-25AI

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 58
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-TQFP, 176-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

PIO User Interface
PIO Controller A Base Address: 0xFFFEC000
PIO Controller B Base Address: 0xFFFF0000
Table 11. PIO Controller Memory Map
Notes:
Offset
0x0C
0x1C
0x2C
0x3C
0x4C
0x5C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x38
0x40
0x44
0x48
0x50
0x54
0x58
1. The reset value of this register depends on the level of the external pins at reset.
2. This register is cleared at reset. However, the first read of the register can give a value not equal to zero if any changes have
occurred on any pins between the reset and the read.
Register
PIO Enable Register
PIO Disable Register
PIO Status Register
Reserved
Output Enable Register
Output Disable Register
Output Status Register
Reserved
Input Filter Enable Register
Input Filter Disable Register
Input Filter Status Register
Reserved
Set Output Data Register
Clear Output Data Register
Output Data Status Register
Pin Data Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Interrupt Status Register
Multi-driver Enable Register
Multi-driver Disable Register
Multi-driver Status Register
Reserved
PIO_SODR
PIO_CODR
PIO_ODSR
PIO_MDER
PIO_MDDR
PIO_MDSR
PIO_PDSR
PIO_IFDR
PIO_ODR
PIO_IFER
PIO_IFSR
PIO_PDR
PIO_OER
PIO_OSR
PIO_PER
PIO_PSR
PIO_IMR
PIO_IER
PIO_IDR
PIO_ISR
Name
–
–
–
–
AT91M63200
Write only
Write only
Read only
Write only
Write only
Read only
Write only
Write only
Read only
Write only
Write only
Read only
Read only
Write only
Write only
Read only
Read only
Write only
Write only
Read only
Access
–
–
–
–
0x3FFFFFFF (A)
0x0FFFFFFF (B)
(see Note 1)
(see Note 2)
Reset State
–
–
–
–
–
0
–
–
–
0
–
–
–
0
–
–
0
–
–
0
–
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